IP Library Patent Application 18917638
Patent Application
App. No. 18/917,638

THREE-DIMENSIONAL MEMORY DEVICE WITH TOP-CONTACT THROUGH-STACK CONTACT VIA STRUCTURES AND METHODS FOR FORMING THE SAME

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Patent No.
US None
App. No.
18/917,638
Abstract

A device structure includes an alternating stack of insulating layers and electrically conductive layers, a retro-stepped dielectric material portion, a memory stack structure vertically extending through the alternating stack and including a vertical semiconductor channel vertical stack of memory elements, and a layer contact via structure. The layer contact via structure may be a tubular layer contact via structure contacting an annular top surface segment of a first electrically conductive layer of the electrically conductive layers. Alternatively, a first electrically conductive layer may include a horizontally-extending portion that is located outside a volume of the contact via opening and a vertically-extending tubular portion located in a peripheral region of the contact via opening, and the layer contact via structure may contact an inner sidewall of the vertically-extending tubular portion.

Claims (45)

1 . A device structure, comprising:

an alternating stack of insulating layers and electrically conductive layers;

a retro-stepped dielectric material portion having a stepped bottom surface and overlying a region of the alternating stack in which the electrically conductive layers have variable lateral extents;

a memory stack structure vertically extending through the alternating stack and comprising a vertical stack of memory elements; and

a tubular layer contact via structure vertically extending through the retro-stepped dielectric material portion and contacting an annular top surface segment of a first electrically conductive layer of the electrically conductive layers.

2 . The device structure of claim 1 , further comprising a tubular dielectric spacer laterally surrounded by the tubular layer contact via structure and overlying the first electrically conductive layer.

3 . The device structure of claim 2 , further comprising a dielectric pillar laterally surrounded by the tubular dielectric spacer and vertically extending through an opening in the first electrically conductive layer and a subset of the electrically conductive layers that underlie the first electrically conductive layer.

4 . The device structure of claim 3 , wherein the dielectric pillar comprises a cylindrical sidewall that vertically extends from a bottommost layer within the alternating stack at least to a horizontal plane including a top surface of the first electrically conductive layer.

5 . The device structure of claim 3 , wherein each electrically conductive layer within the subset of the electrically conductive layers is laterally spaced from the dielectric pillar by a respective outer blocking dielectric layer.

6 . The device structure of claim 3 , wherein the dielectric pillar has a shape of a cylinder and consists of a dielectric fill material.

7 . The device structure of claim 3 , further comprising a vertical stack of annular dielectric spacers located at levels of a subset of the insulating layers that underlie the first electrically conductive layer and laterally surrounding the dielectric pillar.

8 . The device structure of claim 7 , wherein each annular dielectric spacer within the vertical stack of annular dielectric spacers comprises an inner cylindrical sidewall in contact with a respective cylindrical surface segment of the dielectric pillar and an outer cylindrical sidewall in contact with a cylindrical surface of a respective one of the insulating layers.

9 . The device structure of claim 7 , wherein outer cylindrical sidewalls of the annular dielectric spacers and an outer cylindrical sidewall of the tubular layer contact via structure are located within a cylindrical vertical plane.

10 . The device structure of claim 2 , wherein the tubular layer contact via structure comprises a metallic barrier liner and a metal fill material portion that is embedded within the metallic barrier liner and is spaced from the first electrically conductive layer and from the retro-stepped dielectric material portion by the metallic barrier liner.

11 . The device structure of claim 10 , wherein the metallic barrier liner of the tubular layer contact via structure contacts an entirety of an outer sidewall of the tubular dielectric spacer.

12 . The device structure of claim 1 , wherein the first electrically conductive layer comprises an opening having a cylindrical sidewall through which the dielectric pillar vertically extends.

13 . The device structure of claim 12 , wherein the tubular layer contact via structure comprises a hollow cylinder which is laterally offset outward from the cylindrical sidewall by a lateral offset distance.

14 . The device structure of claim 1 , further comprising:

a contact-level dielectric layer overlying the alternating stack and the retro-stepped dielectric material portion; and

a drain contact via structure vertically extending through the contact-level dielectric layer and contacting a top surface of the memory opening fill structure,

wherein top surfaces of the drain contact via structure and the tubular layer contact via structure are located within a horizontal plane including a top surface of the contact-level dielectric layer.

15 . A method of forming a device structure, comprising:

forming an alternating stack of insulating layers and sacrificial material layers over a substrate;

forming stepped surfaces by patterning the alternating stack in a staircase region;

forming a retro-stepped dielectric material portion over the stepped surfaces;

forming memory stack structures through the alternating stack, wherein each of the memory stack structures comprises a respective vertical semiconductor channel and a vertical stack of memory elements;

forming a contact via opening through the retro-stepped dielectric material portion, a subset of the sacrificial material layers within the alternating stack, and a subset of the insulating layers within the alternating stack, wherein a topmost layer within the subset of the sacrificial material layers comprises a first sacrificial material layer;

laterally recessing a sidewall of the retro-stepped dielectric material portion around the contact via opening by performing an etch back process;

forming a sacrificial tubular structure in a peripheral region of the contact via opening on the laterally recessed sidewall of the retro-stepped dielectric material portion;

forming a dielectric pillar in a center region of the contact via opening;

replacing the sacrificial material layers with at least electrically conductive layers, wherein the first sacrificial material layer is replaced at least with a first electrically conductive layer; and

replacing the sacrificial tubular structure with a tubular layer contact via structure, wherein the tubular layer contact via structure contacts an annular top surface segment of the first electrically conductive layer.

16 . The method of claim 15 , wherein the etch back process also forms a vertical stack of annular cavities by laterally recessing the subset of the insulating layers around the contact via opening.

17 . The method of claim 16 , further comprising:

forming a vertical stack of annular dielectric spacers in the vertical stack of annular cavities;

depositing a sacrificial fill material layer in the contact via opening after forming the vertical stack of annular dielectric spacers, wherein a lower portion of the contact via opening located below a horizontal plane including a top surface of the first sacrificial material layer is filled with the sacrificial fill material layer, and an upper portion of the contact via opening located above the horizontal plane comprises a void that is not filled with the sacrificial fill material layer; and

etching the sacrificial fill material layer such that a vertical recess distance for the sacrificial fill material layer is greater than a lateral recess distance for the sacrificial fill material layer to form the sacrificial tubular structure.

18 . The method of claim 17 , wherein:

a remaining portion of the sacrificial fill material layer located below the horizontal plane including the top surface of the first sacrificial material layer comprises a sacrificial fill material portion; and

the method further comprises removing the sacrificial fill material portion without removing the sacrificial tubular structure, wherein the dielectric pillar fills a volume from which the sacrificial fill material portion is removed.

19 . The method of claim 17 , further comprising forming a tubular dielectric spacer on the sacrificial tubular structure.

20 . The method of claim 19 , further comprising:

performing an etch process that etches a material of the sacrificial tubular structure selectively to a material of the tubular dielectric spacer after replacing the sacrificial material layers to form a tubular cavity;

physically exposing an annular surface segment of a top surface of the first electrically conductive layer underneath the tubular cavity; and

depositing at least one electrically conductive material in the tubular cavity directly on the annular surface segment of the top surface of the first electrically conductive layer to form the tubular layer contact via structure surrounding the tubular dielectric spacer.

Assignments (3)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0486 →