JOINT LDPC AND RAID DECODING SCHEME

1 . A method, comprising:

determining a codeword has failed a first decoding process using a first decoding scheme;

based, at least in part, on determining the codeword has failed the first decoding process using the first decoding scheme, identify first parity information and second parity information associated with a portion of the codeword, the first parity information and the second parity information being associated with a second decoding scheme;

adjusting a reliability of the portion of the codeword based, at least in part, on the first parity information and the second parity information; and

providing the reliability of the portion of the codeword to the first decoding scheme for a second decoding process.

2 . The method of claim 1 , wherein the first decoding scheme is a low-density parity check (LDPC) decoding scheme.

3 . The method of claim 1 , wherein the second decoding scheme is a redundant array of independent dies (RAID) decoding scheme.

4 . The method of claim 1 , wherein the first parity information is based, at least in part, on a XOR operation performed on different portions of a stripe codeword associated with the codeword.

5 . The method of claim 1 , wherein the second parity information is based, at least in part, on multiplying different portions of a stripe codeword associated with the codeword with a codebook associated with the second decoding scheme.

6 . The method of claim 1 , wherein the reliability of the portion of the codeword is adjusted when the first parity information agrees with the second parity information.

7 . The method of claim 6 , further comprising increasing the reliability of the portion of the codeword based, at least in part, on a determination that the first parity information and the second parity information agree with hard bit information associated with the codeword.

8 . The method of claim 6 , further comprising decreasing the reliability of the portion of the codeword based, at least in part, on a determination that the first parity information and the second parity information disagree with hard bit information associated with the codeword.

9 . A data storage device, comprising:

a controller; and

an error correction code (ECC) system associated with the controller and operable to:

identify a codeword having a number of errors that exceed a correction capability of a first decoding scheme;

identify first parity information and second parity information associated with the codeword, the first parity information and the second parity information being associated with a second decoding scheme;

calculate a reliability of a portion of the codeword based, at least in part, on the first parity information and the second parity information; and

provide the reliability of the portion of the codeword to the first decoding scheme.

10 . The data storage device of claim 9 , wherein the first parity information is based, at least in part, on a XOR operation performed on different portions of a stripe codeword associated with the codeword.

11 . The data storage device of claim 9 , wherein the second parity information is based, at least in part, on multiplying different portions of a stripe codeword associated with the codeword with a codebook associated with the second decoding scheme.

12 . The data storage device of claim 9 , wherein calculating the reliability of the portion of the codeword comprises adjusting the reliability of the portion of the codeword when the first parity information agrees with the second parity information.

13 . The data storage device of claim 12 , wherein calculating the reliability of the portion of the codeword further comprises increasing the reliability of the portion of the codeword based, at least in part, on a determination that the first parity information and the second parity information agree with hard bit information associated with the codeword.

14 . The data storage device of claim 12 , wherein calculating the reliability of the portion of the codeword further comprises decreasing the reliability of the portion of the codeword based, at least in part, on a determination that the first parity information and the second parity information disagree with hard bit information associated with the codeword.

15 . A data storage device, comprising:

a control means; and

an error correction means associated with the control means and operable to:

identify a plurality of codewords having a number of errors that exceed a correction capability of a first decoding scheme;

determine that a number of the plurality of codewords exceeds a correction capability of a second decoding scheme;

generate a list of potential codewords using at least one portion of a stripe codeword associated with a first codeword of the plurality of codewords using the second decoding scheme;

determine a reliability of each potential codeword in the list of codewords; and

provide at least one potential codeword in the list of codewords to the first decoding scheme.

16 . The data storage device of claim 15 , wherein the first decoding scheme is a low-density parity check (LDPC) decoding scheme and the second decoding scheme is a redundant array of independent dies (RAID) decoding scheme.

17 . The data storage device of claim 15 , wherein the list of potential codewords is ordered based, at least in part, on a determined probability that each potential codewords in the list of potential codewords contain errors.

18 . The data storage device of claim 15 , wherein the potential codewords in the list of potential codewords are ordered based, at least in part, on an amount of errors.

19 . The data storage device of claim 15 , wherein the error correction means is further operable to compare at least a portion of the at least one potential codeword to reliability information associated with the first codeword.

20 . The data storage device of claim 15 , wherein the error correction means is further operable to determine a combined reliability of each of the potential codewords in the list of potential codewords.