IP Library Assignment 011229/0040
Patent Assignment
Reel/Frame 011229/0040

Assignment of Assignor's Interest

Recorded: 2000-10-05 Pages: 2
Assignors
GHEEWALA, TUSHAR R.
Executed: 2000-06-09
BREID, DUANE G.
Executed: 2000-06-19
SHERLEKAR, DEEPAK D.
Executed: 2000-06-12
COLWELL, MICHAEL J.
Executed: 2000-06-19
Assignee
IN-CHIP SYSTEMS, INC.
A CALIFORNIA CORPORATION, 111 W. EVELYN AVENUE, SUITE 202, SUNNYVALE, CALIFORNIA, 94086
Covered Property (1)
Gate Array Architecture Using Elevated Metal Levels for Customization
Patent: 6,617,621 →
Application: 09/588,802 →
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement May 24, 2002
From: IN-CHIP SYSTEMS, INC.
To: GHEEWALA, TUSHAR
Reel/Frame 012735/0281 →
Assignment of Assignor's Interest Nov 5, 2002
From: IN-CHIP SYSTEMS, INC.
To: VIRAGE LOGIC CORPORATION
Reel/Frame 013227/0149 →
Assignment of Assignor's Interest Oct 8, 2010
From: VIRAGE LOGIC CORPORATION; VL C.V.; ARC CORES LIMITED; ARC INTERNATIONAL I.P., INC.
To: SYNOPSYS, INC.
Reel/Frame 025105/0907 →