IP Library › Assignment 012307/0961
Patent Assignment
Reel/Frame 012307/0961

Assignment of Assignor's Interest

Recorded: 2001-11-14 Pages: 2
Assignor
DEDIC, IAN JUSO
Executed: 2001-10-05
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA, 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN
Covered Property (1)
Reducing Jitter in Mixed-Signal Integrated Circuit Devices
Patent: 6,628,219 →
Application: 09/987,279 →
Publication: US 2002/0163456
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 12, 2002
From: CONNOR, DANIEL M.; MILEY, JOHN W.
To: MILLIKEN & COMPANY
Reel/Frame 013180/0855 →
Assignment of Assignor's Interest Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
Change of Name Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
Assignment of Assignor's Interest Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035507/0612 →