IP Library Assignment 012373/0189
Patent Assignment
Reel/Frame 012373/0189

Assignment of Assignor's Interest

Recorded: 2001-12-10 Pages: 4
Assignors
NADEAU-DOSTIE, BENOIT
Executed: 2001-11-08
COTE, JEAN-FRANCOIS
Executed: 2001-11-08
Assignee
LOGICVISION, INC.
101 METRO DRIVE, THIRD FLOOR, SAN JOSE, CALIFORNIA, 95110
Covered Property (1)
Method and Program Product for Designing Hierarchical Circuit for Quiescent Current Testing and Circuit Produced Thereby
Patent: 6,868,532 →
Application: 10/011,128 →
Publication: US 2003/0110457
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement May 4, 2009
From: LOGICVISION, INC.
To: COMERICA BANK
Reel/Frame 022629/0938 →
Release of Security Interest Sep 15, 2009
From: COMERICA BANK
To: LOGICVISION, INC.
Reel/Frame 023234/0037 →
Assignment of Assignor's Interest Apr 14, 2010
From: LOGICVISION, INC.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024233/0056 →
Merger and Change of Name Jun 16, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 057279/0707 →