IP Library › Assignment 012609/0632
Patent Assignment
Reel/Frame 012609/0632

Assignment of Assignor's Interest

Recorded: 2002-02-12 Pages: 4
Assignors
TSENG, PING-SHENG
Executed: 2001-09-06
LIN, SHARON SHEAU-PYNG
Executed: 2001-09-06
SHEN, QUINCY KUN-HSU
Executed: 2001-09-06
TSAI, MIKE MON YEN
Executed: 2001-09-06
WANG, STEVEN
Executed: 2001-09-06
Assignee
AXIS SYSTEMS, INC.
209 JAVA DRIVE, SUNNYVALE, CALIFORNIA, 94089
Covered Property (1)
Method and Apparatus for Simulating a Circuit Using Timing Insensitive Glitch-Free (Tigf) Logic
Patent: 8,244,512 →
Application: 09/954,989 →
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Merger Mar 21, 2005
From: AXIS SYSTEMS, INC.
To: VERISITY DESIGN, INC., A CORP. OF CALIFORNIA
Reel/Frame 015930/0658 →
Assignment of Assignor's Interest Jul 5, 2012
From: VERISITY DESIGN, INC.
To: CADENCE DESIGN SYSTEMS, INC.
Reel/Frame 028496/0022 →