Patent Assignment
Reel/Frame 013484/0228
Assignment of Assignor's Interest
Recorded: 2002-11-14
Pages: 5
Assignor
IN-CHIP SYSTEMS, INC.
Executed: 2002-10-14
Assignee
VIRAGE LOGIC CORPORATION
46501 LANDING PARKWAY, FREMONT, CALIFORNIA, 94538
Covered Properties
(5)
Gate Array Cell Architecture and Routing Scheme
Patent:
5,723,883 →
Application:
08/557,474 →
Integrated Circuit Cell Architecture and Routing Scheme
Patent:
5,923,059 →
Application:
08/747,858 →
Integrated Circuit Cell Architecture and Routing Scheme
Patent:
5,898,194 →
Application:
08/853,875 →
Reduced Area Gate Array Cell Design Based on Shifted Placement of Alternate Rows of Cells
Patent:
5,923,060 →
Application:
08/917,006 →
Power and Signal Routing Technique for Gate Array Design
Patent:
6,091,090 →
Application:
08/933,552 →
Related Assignments
(8)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
May 9, 1997
From: GHEEWALA, TUSHAR R.
To: IN-CHIP SYSTEMS, INC.
Reel/Frame 008554/0754 →
Assignment of Assignor's Interest
May 13, 1997
From: GHEEWALA, TUSHAR R.
To: IN-CHIP SYSTEMS, INC.
Reel/Frame 008513/0820 →
Assignment of Assignor's Interest
Jun 9, 1997
From: GHEEWALA, TUSHAR R.
To: IN-CHIP
Reel/Frame 008569/0988 →
Assignment of Assignor's Interest
Aug 21, 1997
From: GHEEWALA, TUSHAR R.
To: IN-CHIP SYSTEMS, INC.
Reel/Frame 008682/0774 →
Assignment of Assignor's Interest
Sep 19, 1997
From: GHEEWALA, TUSHAR R.
To: IN-CHIP SYSTEMS, INC.
Reel/Frame 008826/0841 →
Assignment of Assignor's Interest
Jan 13, 1998
From: GHEEWALA, TUSHAR R.
To: IN-CHIP SYSTEMS, INC.
Reel/Frame 008895/0247 →
Security Agreement
May 24, 2002
From: IN-CHIP SYSTEMS, INC.
To: GHEEWALA, TUSHAR
Reel/Frame 012735/0281 →
Assignment of Assignor's Interest
Oct 8, 2010
From: VIRAGE LOGIC CORPORATION; VL C.V.; ARC CORES LIMITED; ARC INTERNATIONAL I.P., INC.
To: SYNOPSYS, INC.
Reel/Frame 025105/0907 →