IP Library Assignment 013700/0571
Patent Assignment
Reel/Frame 013700/0571

Assignment of Assignor's Interest

Recorded: 2003-01-23 Pages: 5
Assignors
PRICE, PAUL
Executed: 2003-01-15
COTE, JEAN-FRANCOIS
Executed: 2003-01-16
VERMA, AJIT KUMAR
Executed: 2003-01-20
Assignee
LOGICVISION, INC.
101 METRO DRIVE, THIRD FLOOR, SAN JOSE, CALIFORNIA, 95110
Covered Property (1)
Verification of Embedded Test Structures in Circuit Designs
Patent: 7,103,860 →
Application: 10/349,452 →
Publication: US 2003/0149949
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement May 4, 2009
From: LOGICVISION, INC.
To: COMERICA BANK
Reel/Frame 022629/0938 →
Release of Security Interest Sep 15, 2009
From: COMERICA BANK
To: LOGICVISION, INC.
Reel/Frame 023234/0037 →
Assignment of Assignor's Interest Apr 14, 2010
From: LOGICVISION, INC.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024233/0056 →
Merger and Change of Name Jun 16, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 057279/0707 →