IP Library › Assignment 013780/0530
Patent Assignment
Reel/Frame 013780/0530

Assignment of Assignor's Interest

Recorded: 2003-02-19 Pages: 5
Assignors
NISHIOKA, CHIKA
Executed: 2003-01-31
AKAMATSU, YOSHIKAZU
Executed: 2003-01-31
OHTAKE, HIDEYUKI
Executed: 2003-01-31
Assignees
MITSUBISHI DENKI KABUSHIKI KAISHA
2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO 100-8310, JAPAN
MITSUBISHI ELECTRIC SYSTEM LSI DESIGN CORPORATION
1-17, CHUO 3-CHOME, ITAMI-SHI, HYOGO 664-0851, JAPAN
Covered Property (1)
Fault Simulator for Verifying Reliability of Test Pattern
Patent: 7,096,384 →
Application: 10/367,785 →
Publication: US 2004/0088627
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 10, 2003
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 014502/0289 →
Assignment of Assignor's Interest Apr 7, 2004
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 015185/0122 →
Change of Name Sep 15, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024990/0129 →
Merger Sep 15, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024990/0153 →