IP Library Assignment 014763/0583
Patent Assignment
Reel/Frame 014763/0583

Assignment of Assignor's Interest

Recorded: 2004-06-23 Received: 2004-06-23 Pages: 11
Assignor
AMD (U.S.) HOLDINGS, INC.
Executed: 2004-03-30
Assignee
AMD INVESTMENTS, INC.
ONE AMD PLACE, P.O. BOX 3453, SUNNYVALE, CA, 94088-3453, UNITED STATES
Covered Properties (23)
Method of Manufacturing a Semiconductor Memory with Deuterated Materials
Application: 10/672,093 →
Memory with Improved Charge-Trapping Dielectric Layer
Application: 10/307,189 →
Expandable Shoe and Shoe Assemblies
Application: 10/228,758 →
Memory Manufacturing Process Using Bitline Rapid Thermal Anneal
Application: 10/151,576 →
Semiconductor Memory with Deuterated Materials
Application: 10/128,771 →
Memory Manufacturing Process Using Disposable Arc for Wordline Formation
Application: 10/126,280 →
Memory Manufacturing Process with Bitline Isolation
Application: 10/118,732 →
Method of Making Memory Wordline Hard Mask Extension
Application: 10/109,516 →
Semiconductor memory with data retention liner
Application: 10/109,527 →
Liner for Semiconductor Memories and Manufacturing Method Therefor
Application: 10/109,234 →
Memory Wordline Hard Mask
Application: 10/109,235 →
Hard Mask Process for Memory Device Without Bitline Shorts
Application: 10/100,485 →
Programmable task scheduler for use with multiport xDSL processing system
Application: 09/797,648 →
Mixed Hardware/Software Architecture and Method for Processing Xdsl Communications
Application: 09/797,793 →
Physical Medium Dependent Sub-System with Shared Resources for Multiport Xdsl System
Application: 09/798,113 →
Logical Pipeline for Data Communications System
Application: 09/798,054 →
System and Method for a Family of Digital Subscriber Line (Xdsl) Signal Processing Circuit Operating with an Internal Clock Rate That Is Higher Than All Communications Ports Operating with a Plurality of Port Sampling Clock Rates
Application: 09/797,789 →
Data Object Architecture and Method for Xdsl Asic Processor
Application: 09/797,755 →
Scaleable Architecture for Multiple-Port, System-on-Chip Adsl Communications Systems
Application: 09/797,633 →
Xdsl Symbol Processor & Method of Operating Same
Application: 09/797,782 →
xDSL function ASIC processor & method of operation
Application: 09/798,133 →
Xdsl Communications Systems Using Shared/Multi-Function Task Blocks
Application: 09/797,778 →
Transport Convergence Sub-System with Shared Resources for Multiport Xdsl System
Application: 09/797,634 →