IP Library › Assignment 014919/0679
Patent Assignment
Reel/Frame 014919/0679

Assignment of Assignor's Interest

Recorded: 2004-01-23 Pages: 2
Assignors
KUROSE, SHINICHI
Executed: 2004-01-05
KUMAGAI, KENJI
Executed: 2004-01-05
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA, 4-CHOME NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN
Covered Property (1)
Method of Designing Semiconductor Integrated Circuit with Accurate Capacitance Extraction
Patent: 7,032,207 →
Application: 10/762,277 →
Publication: US 2004/0168144
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
Change of Name Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
Assignment of Assignor's Interest Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0337 →