IP Library › Assignment 014960/0207
Patent Assignment
Reel/Frame 014960/0207

Assignment of Assignor's Interest

Recorded: 2004-01-30 Pages: 3
Assignors
RADKE, WILLIAM H.
Executed: 2003-11-25
SWAMINATHAN, SHUBA
Executed: 2003-12-02
KEAYS, BRADY L.
Executed: 2003-12-01
Assignee
MICRON TECHNOLOGY, INC.
8000 SOUTH FEDERAL WAY, BOISE, IDAHO, 83716-9632
Covered Property (1)
Error Detection and Correction Scheme for a Memory Device
Patent: 7,389,465 →
Application: 10/769,001 →
Publication: US 2005/0172207
Related Assignments (5)
Other recorded transfers of the patent in this record — the chain of ownership.
Patent Security Agreement Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
Security Interest Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
Release of Security Interest Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
Release of Security Interest Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
Release of Security Interest Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →