IP Library Assignment 015022/0409
Patent Assignment
Reel/Frame 015022/0409

Assignment of Assignor's Interest

Recorded: 2004-08-11 Pages: 4
Assignors
SCHLOESSER, TILL
Executed: 2004-06-01
MANGER, DIRK
Executed: 2004-06-01
GOEBEL, DERND
Executed: 2004-06-04
Assignee
INFINEON TECHNOLOGIES AG
ST. MARTIN STR. 53, MUNICH, 81669, GERMANY
Covered Property (1)
Architecture for Vertical Transistor Cells and Transistor-Controlled Memory Cells
Patent: 7,109,544 →
Application: 10/777,128 →
Publication: US 2005/0001257
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 15, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023821/0535 →
Assignment of Assignor's Interest May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
Assignment of Assignor's Interest Oct 15, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036873/0758 →