Patent Assignment
Reel/Frame 015042/0109
Assignment of Assignor's Interest
Recorded: 2004-03-01
Pages: 2
Assignors
PRITCHARD, DAVID
Executed: 2004-02-19
BHATT, HERMANSHU
Executed: 2004-02-19
PRICE, DAVID T.
Executed: 2004-02-23
Assignee
LSI LOGIC CORPORATION
1621 BARBER LANE, MS D-106, MILPITAS, CALIFORNIA, 95035
Covered Property
(1)
Spacer-less transistor integration scheme for high-k gate dielectrics and small gate-to-gate spaces applicable to Si, SiGe strained silicon schemes
Application:
10/791,337 →
Publication:
US 2005/0191812
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0001 →
Security Interest
Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
Security Interest
Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 060885/0001 →