IP Library › Assignment 015054/0809
Patent Assignment
Reel/Frame 015054/0809

Assignment of Assignor's Interest

Recorded: 2004-03-05 Pages: 2
Assignor
SHIKATA, TAKASHI
Executed: 2003-02-12
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA, 4-CHOME NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN
Covered Property (1)
Method of Controlling Data Transfer Within a Semiconductor Integrated Circuit Based on a Clock Sync Control Signal
Patent: 7,290,158 →
Application: 10/792,793 →
Publication: US 2005/0028018
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Request for Corrected Notice of Recordation of Assignment Document to Correct Execution Date Previously Recorded on Reel/Frame 015054/0809 Oct 5, 2004
From: SHIKATA, TAKASHI
To: FUJITSU LIMITED
Reel/Frame 015857/0960 →
Assignment of Assignor's Interest Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
Change of Name Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
Assignment of Assignor's Interest Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0469 →