IP Library Assignment 015786/0563
Patent Assignment
Reel/Frame 015786/0563

Assignment of Assignor's Interest

Recorded: 2005-02-24 Pages: 3
Assignors
VERNENKER, HEMANSHU T.
Executed: 2005-02-04
DE LA CRUZ, LOUIS
Executed: 2005-02-04
WHITE, ALLEN
Executed: 2005-02-08
Assignee
LATTICE SEMICONDUCTOR CORPORATION
5555 N.E. MOORE COURT, HILLSBORO, OREGON, 97124-6421
Covered Property (1)
Multi-Port Memory Systems and Methods for Bit Line Coupling
Patent: 7,221,607 →
Application: 11/054,011 →
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest Mar 18, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035222/0866 →
Security Interest May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
Release of Security Interest May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →