Patent Assignment
Reel/Frame 016087/0211
Assignment of Assignor's Interest
Recorded: 2005-04-15
Pages: 8
Assignors
ANGLE, JAY H.
Executed: 2002-07-09
GORSUCH, CHRISTOPHER D
Executed: 2002-07-09
MERCADO, OSCAR G.
Executed: 2002-07-09
MYERS, ANTHONY K
Executed: 2002-07-09
SCHADT, JOHN A
Executed: 2002-07-09
YEAGER, BRIAN W
Executed: 2002-07-09
Assignee
LATTICE SEMICONDUCTOR CORPORATION
5555 NE MOORE CT, HILLSBORO, OREGON, 97124
Covered Property
(1)
Integrated Circuit and Associated Design Method with Antenna Error Control Using Spare Gates
Patent:
6,877,667 →
Application:
10/640,804 →
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest
Mar 18, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035222/0866 →
Release of Security Interest
May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
Security Interest
May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →