IP Library › Assignment 016767/0721
Patent Assignment
Reel/Frame 016767/0721

Assignment of Assignor's Interest

Recorded: 2005-09-09 Pages: 3
Assignors
GOEL, ASHISH KUMAR
Executed: 2005-08-23
AGGARWAL, DAVINDER
Executed: 2005-08-23
Assignee
STMICROELECTRONICS PVT. LTD.
PLOT NO. 2, 3 & 18, SECTOR 16A, INSTITUTIONAL AREA, NOIDA-201 301, UTTAR PRADESH, INDIA
Covered Property (1)
Fpga-Based Digital Circuit for Reducing Readback Time
Patent: 7,271,616 →
Application: 11/190,509 →
Publication: US 2006/0022700
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 17, 2008
From: STMICROELECTRONICS PVT, LTD.
To: STMICROELECTRONICS NV
Reel/Frame 020385/0574 →
Assignment of Assignor's Interest Jan 17, 2008
From: STMICROELECTRONICS N.V.
To: SICRONIC REMOTE KG, LLC
Reel/Frame 020385/0581 →
Merger Nov 2, 2015
From: SICRONIC REMOTE KG, LLC
To: MINERAL LASSEN LLC
Reel/Frame 036940/0693 →