IP Library Assignment 019028/0461
Patent Assignment
Reel/Frame 019028/0461

Assignment of Assignor's Interest

Recorded: 2007-03-19 Pages: 6
Assignor
ADVANCED MICRO DEVICES, INC.
Executed: 2007-01-31
Assignee
SPANSION INC.
915 DEGUIGNE DRIVE, P.O. BOX 3453, MAIL STOP 250, SUNNYVALE, CALIFORNIA, 94088-3453
Covered Properties (26)
Method and Apparatus for Non-Destructive Access of Volatile and Non-Volatile Data in a Shadow Memory Array
Patent: 4,716,552 →
Application: 06/717,348 →
Memory Cell Providing Simultaneous Non-Destructive Access to Volatile and Non-Volatile Data
Patent: 4,672,580 →
Application: 06/728,963 →
High Voltage Isolation Circuit for Cmos Networks
Patent: 4,672,241 →
Application: 06/738,925 →
Integrated Circuit Structure Having Gate Electrode and Underlying Oxide and Method of Making Same
Patent: 4,789,883 →
Application: 06/811,057 →
Method of Improving Silicon Dioxide
Patent: 4,774,197 →
Application: 06/875,111 →
Method of Fabricating Passivated Tunnel Oxide
Patent: 4,894,353 →
Application: 07/187,738 →
One Transistor Flash Eprom Cell
Patent: 4,958,321 →
Application: 07/247,887 →
Eprom Element Employing Self-Aligning Process
Patent: 4,964,143 →
Application: 07/276,278 →
Method of Forming and Removing Polysilicon Lightly Doped Drain Spacers
Patent: 5,013,675 →
Application: 07/355,634 →
Semiconductor Antifuse Structure and Method
Patent: 4,914,055 →
Application: 07/398,141 →
Asynchronous/Synchronous Pipeline Dual Mode Memory Access Circuit and Method
Patent: 5,107,465 →
Application: 07/407,403 →
Flash Eeprom Array with Negative Gate Voltage Erase Operation
Patent: 5,077,691 →
Application: 07/426,332 →
Flash Eeprom Array with Paged Erase Architecture
Patent: 5,126,808 →
Application: 07/426,601 →
Process for Fabricating a Control Gate for a Floating Gate Fet
Patent: 4,992,391 →
Application: 07/442,903 →
Back-To-Back Capacitor Charge Pumps
Patent: 5,008,799 →
Application: 07/505,292 →
High Voltage Charge Pumps with Series Capacitors
Patent: 5,059,815 →
Application: 07/505,335 →
Power Control Circuit
Patent: 5,113,373 →
Application: 07/563,061 →
Eprom Element Employing Self-Aligning Process
Patent: 5,091,326 →
Application: 07/581,341 →
Method of Page-Mode Programming Flash Eeprom Cell Arrays
Patent: 5,191,556 →
Application: 07/668,608 →
Vpp Power Supply Having a Regulator Circuit for Controlling a Regulated Positive Potential
Patent: 5,291,446 →
Application: 07/964,684 →
Drain Power Supply
Patent: 5,263,000 →
Application: 07/964,697 →
Power-On Reset Circuit
Patent: 5,376,835 →
Application: 07/964,806 →
Negative Power Supply
Patent: 5,282,170 →
Application: 07/964,807 →
Memory Architecture for a Three Volt Flash Eeprom
Patent: 5,477,499 →
Application: 08/135,224 →
A Sense Circuit for a Flash Eeprom Cell Having a Negative Delta Threshold Voltage
Patent: 5,579,274 →
Application: 08/483,038 →
Substrate Bias for Programming Non-Volatile Memory
Patent: 7,023,740 →
Application: 10/755,979 →
Related Assignments (7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 26, 2007
From: SPANSION INC.
To: SPANSION LLC
Reel/Frame 019063/0765 →
Security Agreement Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
Security Agreement Aug 23, 2012
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 028840/0001 →
Release of Security Interest Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036018/0001 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036021/0118 →
Assignment of Assignor's Interest Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036018/0546 →