IP Library Assignment 019263/0187
Patent Assignment
Reel/Frame 019263/0187

Assignment of Assignor's Interest

Recorded: 2007-05-08 Pages: 6
Assignor
MAYDER, ROMI O.
Executed: 2007-03-10
Assignee
SILICON TEST SYSTEMS, INC.
1331 SIERRA AVENUE, SAN JOSE, CALIFORNIA, 95126
Covered Property (1)
Solid High Aspect Ratio via Hole Used for Burn-in Boards, Wafer Sort Probe Cards, and Package Test Load Boards with Electronic Circuitry
Patent: 7,750,650 →
Application: 11/685,866 →
Publication: US 2008/0100291
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 9, 2009
From: SILICON TEST SYSTEMS, INC.
To: VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 022078/0762 →
Assignment of Assignor's Interest Mar 20, 2012
From: VERIGY (SINGAPORE) PTE LTD
To: ADVANTEST (SINGAPORE) PTE LTD
Reel/Frame 027896/0018 →
Assignment of Assignor's Interest Apr 6, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035371/0265 →
Corrective Assignment to Correct the Assignee Address Previously Recorded at Reel: 035371 Frame: 0265. Assignor(S) Hereby Confirms the Assignment. Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035425/0768 →