Patent Assignment
Reel/Frame 020582/0432
Assignment of Assignor's Interest
Recorded: 2008-03-02
Pages: 6
Assignor
MELVIN, STEPHEN
Executed: 2007-12-22
Assignee
TEPLIN APPLICATION LIMITED
2711 CENTERVILLE RD., SUITE 400, WILMINGTON, DELAWARE, 19808
Covered Properties
(10)
Hardware Enforced Virtual Sequentiality
Patent:
6,981,110 →
Application:
10/065,340 →
Packet Processor Memory Interface
Patent:
7,107,402 →
Application:
11/306,375 →
Packet Processor Memory Conflict Prediction
Patent:
7,441,088 →
Application:
11/530,895 →
Packet Processor Memory Interface with Speculative Memory Reads
Patent:
7,506,104 →
Application:
11/930,202 →
Packet Processor Memory Interface with Active Packet List
Patent:
7,487,304 →
Application:
11/930,203 →
Packet Processor Memory Interface with Late Order Binding
Patent:
7,496,721 →
Application:
11/930,205 →
Packet Processor Memory Interface with Write Dependency List
Patent:
7,475,200 →
Application:
11/930,207 →
Packet Processor Memory Interface with Conditional Delayed Restart
Patent:
7,475,201 →
Application:
11/930,209 →
Packet Processor Memory Interface with Conflict Detection and Checkpoint Repair
Patent:
7,478,209 →
Application:
11/930,211 →
Packet Processor Memory Interface with Memory Conflict Value Checking
Patent:
7,444,481 →
Application:
11/930,214 →
Related Assignments
(2)
Other recorded transfers of the patents in this record — the chain of ownership.