IP Library Assignment 020785/0557
Patent Assignment
Reel/Frame 020785/0557

Assignment of Assignor's Interest

Recorded: 2008-04-10 Pages: 5
Assignors
LAW, HENRY
Executed: 2005-11-04
SHARPE-GEISLER, BRAD
Executed: 2005-11-04
TRAN, GIAP
Executed: 2005-11-04
TRUONG, KIET
Executed: 2005-11-04
NGUYEN, BAI
Executed: 2005-11-04
Assignee
LATTICE SEMICONDUCTOR CORPORATION
5555 NE MOORE COURT, HILLSBORO, OREGON, 97124-6421
Covered Property (1)
Programmable Logic Device with Power-Saving Architecture
Patent: 7,558,143 →
Application: 12/100,859 →
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest Mar 24, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035308/0345 →
Security Interest May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
Release of Security Interest May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →