IP Library Assignment 020825/0349
Patent Assignment
Reel/Frame 020825/0349

Assignment of Assignor's Interest

Recorded: 2008-04-01 Pages: 2
Assignors
YABUMOTO, NORIKO
Executed: 2008-03-19
SATOH, AKIKO
Executed: 2008-03-19
ZHANG, ZHENGJUN
Executed: 2008-03-20
MATSUURA, TAKASHI
Executed: 2008-03-19
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN
Covered Property (1)
Method and Apparatus for Logic Equivalence Verification, and Computer Product
Patent: 7,971,165 →
Application: 12/081,127 →
Publication: US 2008/0256498
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
Change of Name Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
Assignment of Assignor's Interest Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →