IP Library Assignment 021756/0648
Patent Assignment
Reel/Frame 021756/0648

Assignment of Assignor's Interest

Recorded: 2008-10-29 Pages: 4
Assignors
EUN, YONG SEOK
Executed: 2008-10-24
KIM, SU HO
Executed: 2008-10-24
LEE, AN BAE
Executed: 2008-10-24
SEO, HYE JIN
Executed: 2008-10-24
Assignee
HYNIX SEMICONDUCTOR INC.
SAN 136-1, AMI-RI, BUBAL-EUP, ICHEON-SI, GYEONGGI-DO, 467-701, KOREA, REPUBLIC OF
Covered Property (1)
Method for Fabricating Transistor in a Semiconductor Device Utilizing an Etch Stop Layer Pattern as a Dummy Pattern for the Gate Electrode Formation.
Patent: 7,851,298 →
Application: 12/259,799 →
Publication: US 2009/0111255
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
Assignment of Assignor's Interest May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
Corrective Assignment to Correct the Assignee Is Hynix Semiconductor Inc. Not Hynix-Semiconductor Inc. There Is No Hyphen in the Name. Previously Recorded on Reel 67328 Frame 814. Assignor(S) Hereby Confirms the Change of Name. May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →