IP Library Assignment 023196/0950
Patent Assignment
Reel/Frame 023196/0950

Merger

Recorded: 2009-09-09 Received: 2009-09-09 Pages: 6
Assignor
APPLIED MICRO CIRCUITS CORPORATION
Executed: 1987-03-27
Assignee
APPLIED MICRO CIRCUITS CORPORATION
6290 SEQUENCE DRIVE, SAN DIEGO, CA, 92121, UNITED STATES
Covered Properties (28)
High Compliance Laser Driver
Application: 10/404,908 →
Detection Circuit and Method for Ac Coupled Circuitry
Application: 10/404,573 →
System and Method for Receiving Data at a First Rate and Adapting the Data for Being Transported at a Second Rate
Application: 10/401,474 →
Dual Function Clock Signal Suitable for Host Control of Synchronous and Asynchronous Target Devices
Application: 10/394,843 →
Signal Routing in a Node of a 1:N Automatic Protection Switching Network
Application: 10/356,167 →
Stackable Test Apparatus for Protecting Integrated Circuit Packages During Testing
Application: 10/309,522 →
Reset Feature for a Low Voltage Differential Latch
Application: 10/304,310 →
Method for Measuring the Frequency Response of a Transimpedance Amplifier Packaged with an Integrated Limiter
Application: 10/295,065 →
Method and Apparatus for Maximizing an Amplitude of an Output Signal of a Differential Multiplexer
Application: 10/290,659 →
Electronic Package Substrate with an Upper Dielectric Layer Covering High Speed Signal Traces
Application: 10/254,120 →
System and Method for Testing High Pin Count Electronic Devices Using a Test Board with Limited Test Channels
Application: 10/224,894 →
Electronic Package with Offset Reference Plane Cutout
Application: 10/202,322 →
Optical Transport Network Frame Structure with in-Band Data Channel and Forward Error Correction
Application: 10/171,297 →
Optical Transport Network Frame Structure with Dynamically Allocable in-Band Data Channel and Forward Error Correction Byte Capacity
Application: 10/170,995 →
Fanned Out Interconnect via Structure for Electronic Package Substrates
Application: 10/145,496 →
Electronic Device Package with High Speed Signal Interconnect Between Die Pad and External Substrate Pad
Application: 10/138,662 →
Digital Delay Lock Loop for Setup and Hold Time Enhancement
Application: 10/120,599 →
Global Clock Tree De-Skew
Application: 10/120,576 →
Flexible Interconnect Cable with High Frequency Electrical Transmission Line
Application: 10/107,667 →
High Frequency Signal Transmission from the Surface of a Circuit Substrate to a Flexible Interconnect Cable
Application: 10/107,662 →
Embedded Frequency Counter with Flexible Configuration
Application: 10/034,455 →
Methods and Apparatus for Reducing the Crowbar Current in a Driver Circuit
Application: 09/966,013 →
Methods and Apparatus for Generating a Supply-Independent and Temperature-Stable Bias Current
Application: 09/965,971 →
Package Substrate Interconnect Layout for Providing Bandpass/Lowpass Filtering
Application: 09/919,273 →
Integrated Circuit Template Cell System and Method
Application: 09/871,473 →
System and Method for Systolic Array Sorting of Information Segments
Application: 09/832,784 →
System and Method for Solder Ball Rework
Application: 09/832,779 →
System and Method for Switch Timing Synchronization
Application: 09/829,214 →