IP Library Assignment 023796/0685
Patent Assignment
Reel/Frame 023796/0685

Assignment of Assignor's Interest

Recorded: 2010-01-14 Pages: 6
Assignor
Assignee
TESSERA INTELLECTUAL PROPERTIES, INC.
3025 ORCHARD PARKWAY, SAN JOSE, CALIFORNIA, 95134
Covered Properties (16)
Chip Stacking by Edge Metallization
Patent: 5,818,107 →
Application: 08/785,187 →
Full Additive Process with Filled Plated Through Holes
Patent: 6,195,883 →
Application: 09/047,984 →
Surface Metal Balancing to Reduce Chip Carrier Flexing
Patent: 6,497,943 →
Application: 09/503,395 →
High Density Design for Organic Chip Carriers
Patent: 6,538,213 →
Application: 09/506,951 →
Method to Reduce Number of Wire-Bond Loop Heights Versus the Total Quantity of Power and Signal Rings
Patent: 6,414,386 →
Application: 09/531,971 →
Organic Dielectric Electronic Interconnect Structures and Method for Making
Patent: 6,931,723 →
Application: 09/665,366 →
Reduction of Chip Carrier Flexing During Thermal Cycling
Patent: 6,528,179 →
Application: 09/691,935 →
Full Additive Process with Filled Plated Through Holes
Patent: 6,664,485 →
Application: 09/778,702 →
Publication: US 2001/0007289
Full Additive Process with Filled Plated Through Holes
Patent: 6,418,616 →
Application: 09/795,852 →
Publication: US 2001/0009066
Chip Carrier for a High-Frequency Electronic Package
Patent: 6,717,255 →
Application: 10/032,675 →
Publication: US 2002/0055277
Method and Packaging Structure for Optimizing Warpage of Flip Chip Organic Packages
Patent: 6,747,331 →
Application: 10/197,335 →
Publication: US 2004/0012086
Electronic Package with Filled Blinds Vias
Patent: 7,084,509 →
Application: 10/263,909 →
Publication: US 2004/0065960
Method of Forming Filled Blind Vias
Patent: 6,924,224 →
Application: 10/729,174 →
Publication: US 2004/0132279
Method and Packaging Structure for Optimizing Warpage of Flip Chip Organic Packages
Patent: 7,026,706 →
Application: 10/771,728 →
Publication: US 2004/0155339
Method to Reduce Number of Wire-Bond Loop Heights Versus the Total Quantity of Power and Signal Rings
Patent: 6,946,746 →
Application: 10/801,764 →
Publication: US 2004/0173893
Organic Dielectric Electronic Interconnect Structures and Method for Making
Patent: 7,253,512 →
Application: 11/074,848 →
Publication: US 2005/0150686
Related Assignments (3)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Interest Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
Security Interest Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
Release of Security Interest Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION
Reel/Frame 052920/0001 →