IP Library Assignment 023985/0780
Patent Assignment
Reel/Frame 023985/0780

Assignment of Assignor's Interest

Recorded: 2010-02-25 Pages: 5
Assignor
HITACHI, LTD.
Executed: 2010-02-05
Assignee
ELPIDA MEMORY, INC.
2-1, YAESU 2-CHOME, CHUO-KU, TOKYO, JAPAN
Covered Properties (38)
Semiconductor Memory Device
Patent: 5,115,413 →
Application: 07/496,258 →
Semiconductor Memory Device with Improved Substrate Arrangement to Permit Forming a Plurality of Different Types of Random Access Memory, and a Testing Method Therefor
Patent: 5,217,917 →
Application: 07/496,280 →
Data Output Buffer for a Semiconductor Memory
Patent: 5,161,120 →
Application: 07/496,531 →
Output Buffer Circuits for Reducing Ground Bounce Noise
Patent: 5,268,868 →
Application: 07/703,845 →
Semiconductor Memory Device
Patent: 5,313,423 →
Application: 07/754,019 →
Semiconductor Integrated Circuit Device
Patent: 5,272,676 →
Application: 07/789,018 →
Semiconductor Integrated Circuit Device with Internal Voltage Drop Circuits
Patent: 5,335,203 →
Application: 07/834,354 →
Semiconductor Integrated Circuit Device Having a Plurality of Memory Blocks and a Lead on Chip (Loc) Arrangement
Patent: 5,208,782 →
Application: 07/892,708 →
Process for Fabricating Phase Shift Mask and Process of Semiconductor Integrated Circuit Device
Patent: 5,441,834 →
Application: 07/943,002 →
Semiconductor Memory, Components and Layout Arrangements Thereof, and Method of Testing the Memory
Patent: 5,311,476 →
Application: 07/943,341 →
Semiconductor Memory Device with Improved Substrate Arrangement to Permit Forming a Plurality of Different Types of Random Access Memory, and a Testing Method Therefor
Patent: 5,426,613 →
Application: 07/972,907 →
Semiconductor Memory Device
Patent: 5,289,428 →
Application: 07/972,913 →
Semiconductor Memory Device
Patent: 5,422,839 →
Application: 08/118,645 →
A Semiconductor Memory Device Facilitated with Plural Self-Refresh Modes
Patent: 5,467,315 →
Application: 08/234,414 →
Semiconductor Memory Device
Patent: 5,436,870 →
Application: 08/283,177 →
Semiconductor Device
Patent: 5,495,118 →
Application: 08/323,939 →
Process for Fabricating Phase Shift Mask and Process of Semiconductor Integrated Circuit Device
Patent: 5,677,092 →
Application: 08/383,839 →
Semiconductor Memory Device Having a Large Storage Capacity and a High Speed Operation
Patent: 5,677,887 →
Application: 08/401,693 →
Semiconductor Memory Device with Improved Substrate Arrangement to Permit Forming a Plurality of Different Types of Random Access Memory, and a Testing Method Therefor
Patent: 5,805,513 →
Application: 08/432,867 →
Semiconductor Memory
Patent: 5,598,372 →
Application: 08/507,604 →
Semiconductor Device
Patent: 5,625,214 →
Application: 08/525,214 →
Semiconductor Memory Device and Memory System
Patent: 5,818,784 →
Application: 08/638,128 →
Semiconductor Device
Patent: 5,783,851 →
Application: 08/796,689 →
Semiconductor Device
Patent: 6,121,681 →
Application: 08/856,145 →
Semiconductor Memory Device
Patent: 5,963,467 →
Application: 08/982,457 →
Semiconductor Memory Device and Memory System
Patent: 5,969,996 →
Application: 09/144,526 →
Semiconductor Device
Patent: 6,169,325 →
Application: 09/210,883 →
Semiconductor Memory Device
Patent: 6,178,108 →
Application: 09/258,462 →
Semiconductor Integrated Circuit Device
Patent: 6,411,160 →
Application: 09/376,470 →
Semiconductor Memory Device and Memory System
Patent: 6,064,605 →
Application: 09/395,158 →
Semiconductor Integrated Circuit Device
Patent: 6,335,893 →
Application: 09/446,025 →
Semiconductor device
Patent: 6,335,901 →
Application: 09/531,467 →
Semiconductor memory device and memory system
Patent: 6,282,141 →
Application: 09/571,512 →
Semiconductor Memory Device and Memory System
Patent: 6,633,508 →
Application: 09/939,677 →
Publication: US 2002/0031036
Semiconductor Device
Patent: 6,549,484 →
Application: 09/964,669 →
Publication: US 2002/0018396
Reference Voltage Generator Permitting Stable Operation
Patent: 6,535,435 →
Application: 10/012,522 →
Publication: US 2002/0041531
Semiconductor Integrated Circuit Device Having an Optimal Circuit Layout to Ensure Stabilization of Internal Source Voltages Without Lowering Circuit Functions and/or Operating Performance
Patent: 6,518,835 →
Application: 10/142,897 →
Publication: US 2002/0130714
Semiconductor Device
Patent: 6,754,133 →
Application: 10/231,286 →
Publication: US 2003/0002316
Related Assignments (6)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Feb 25, 2010
From: HITACHI, LTD.
To: ELPIDA MEMORY, INC.
Reel/Frame 023985/0775 →
Security Agreement Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
Assignment of Assignor's Interest May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032899/0588 →
Assignment of Assignor's Interest May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032901/0196 →
Change of Name Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
Assignment of Assignor's Interest Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →