IP Library Assignment 024934/0593
Patent Assignment
Reel/Frame 024934/0593

Assignment of Assignor's Interest

Recorded: 2010-09-02 Pages: 6
Assignor
SILICON TEST SYSTEMS, INC.
Executed: 2008-12-26
Assignee
VERIGY (SINGAPORE) PTE. LTD.
NO. 1 YISHUN AVE. 7, LOT 1937C, 1935X, 1975P, SINGAPORE, 768923, SINGAPORE
Covered Property (1)
High Impedance, High Parallelism, High Temperature Memory Test System Architecture
Patent: 8,269,515 →
Application: 12/849,700 →
Publication: US 2010/0301885
Related Assignments (5)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 1, 2010
From: MAYDER, ROMI O.
To: SILICON TEST SYSTEMS, INC.
Reel/Frame 024925/0666 →
Assignment of Assignor's Interest Mar 20, 2012
From: VERIGY (SINGAPORE) PTE LTD
To: ADVANTEST (SINGAPORE) PTE LTD
Reel/Frame 027896/0018 →
Assignment of Assignor's Interest Apr 6, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035371/0265 →
Corrective Assignment to Correct the Assignee Address Previously Recorded at Reel: 035371 Frame: 0265. Assignor(S) Hereby Confirms the Assignment. Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035425/0768 →
Change of Address Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →