Patent Assignment
Reel/Frame 025703/0466
Second Lien Collateral Assignment of Intellectual Property Security
Recorded: 2011-01-26
Received: 2011-01-26
Pages: 18
Assignor
TCO FUNDING CORP.
Executed: 2010-12-29
Assignee
AMERICAN CAPITAL, LTD.
2200 ROSS AVENUE, SUITE 4500W, DALLAS, TX, 75201, UNITED STATES
Covered Properties
(34)
Combined Strut and Connector Retaining Wall System and Method Therefor
Application:
12/923,934 →
Extensible Shells and Related Methods for Constructing a Support Pier
Application:
12/880,804 →
Method and Apparatus for Making an Expanded Base Pier
Application:
12/875,986 →
Apparatus and Method for Ground Improvement
Application:
12/792,258 →
Integral Polyethlene Terephthalate Grids, the Method of Manufacture, and Uses Thereof
Application:
12/449,379 →
Pavement Overlay Material and Method
Application:
61/300,594 →
Pavement Life Extension Product and Method
Application:
12/542,916 →
Erosion Control Ballast and Soil Confinement Mat
Application:
12/461,605 →
Shielded Tamper and Method of Use for Making Aggregate Columns
Application:
12/511,310 →
Pavement Life Extension Product and Method
Application:
12/337,889 →
Polypropylene grids manufactured with a beta nucleation additive, the method of manufacture and uses thereof
Application:
12/078,806 →
Method and Apparatus for Creating Support Columns Using a Hollow Mandrel with Upward Flow Restrictors
Application:
12/035,976 →
Simulation Control Techniques
Application:
12/030,192 →
System and Method of Debugging Multi-Threaded Processes
Application:
12/001,238 →
Apparatus for Providing a Support Column
Application:
11/979,558 →
Slotted Mandrel for Lateral Displacement Pier and Method of Use
Application:
11/913,111 →
Method of Providing a Support Column
Application:
11/882,454 →
Simulation with Dynamic Run-Time Accuracy Adjustment
Application:
11/707,412 →
System and method for stopping integrated circuit simulation
Application:
11/637,374 →
Techniques for Coordinating and Controlling Debuggers in a Simulation Environment
Application:
11/637,376 →
Method and system for instruction set simulation with concurrent attachment of multiple debuggers
Application:
11/637,418 →
Techniques for Creating and Using a Hierarchical Data Structure
Application:
11/607,243 →
Lightweight polypropylene nets manufactured with a beta nucleation additive, the method of manufacture and uses thereof
Application:
11/628,240 →
Pyramidal or Conical Shaped Tamper Heads and Method of Use for Making Rammed Aggregate Piers
Application:
11/528,686 →
User interface for facilitation of high level generation of processor extensions
Application:
11/388,484 →
Method and System for Automatic Generation of Instruction-Set Documentation from an Abstract Processor Model Described Using a Hierarchical Architectural Description Language
Application:
11/145,240 →
Compiler Retargeting Based on Instruction Semantic Models
Application:
11/140,353 →
Scheduling of Instructions
Application:
11/096,184 →
Transaction Level Model Synthesis
Application:
10/976,402 →
Determining Large-Scale Finite State Machines Using Constraint Relaxation
Application:
10/937,068 →
Lateral Displacement Pier and Method of Installing the Same
Application:
10/772,756 →
Automatic Generation of Transaction Level Bus Simulation Instructions from Bus Protocol
Application:
10/700,601 →
Method of Protocol Conversion Between Synchronous Protocols That Are Suitable for Synthesis
Application:
10/700,600 →
Lateral Displacement Pier and Method of Installing the Same
Application:
10/178,676 →