IP Library Assignment 025926/0720
Patent Assignment
Reel/Frame 025926/0720

Assignment of Assignor's Interest

Recorded: 2011-03-09 Pages: 3
Assignor
EMA, TAIJI
Executed: 2011-02-25
Assignee
FUJITSU SEMICONDUCTOR LIMITED, INC.
NOMURA FUDOSAN, SHIN-YOKAHAMA BUILDING, 2-10-23 SHIN-YOKOHAMA, KOHOKU-KU YOKOHAMA, KANAGAWA, 222-0033, JAPAN
Covered Property (1)
Method for Minimizing Defects in a Semiconductor Substrate Due to Ion Implantation
Patent: 8,377,807 →
Application: 12/895,657 →
Publication: US 2012/0083103
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 9, 2011
From: SHIFREN, LUCIAN
To: SUVOLTA, INC.
Reel/Frame 025926/0567 →
Assignment of Assignor's Interest Mar 9, 2011
From: FUJITSU SEMICONDUCTOR LIMITED, INC.
To: SUVOLTA, INC.
Reel/Frame 025926/0876 →
Assignment of Assignor's Interest Apr 27, 2015
From: SU VOLTA, INC.
To: MIE FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 035508/0113 →