IP Library › Assignment 027126/0092
Patent Assignment
Reel/Frame 027126/0092

Assignment of Assignor's Interest

Recorded: 2011-10-26 Pages: 4
Assignors
NOZUYAMA, YASUYUKI
Executed: 2007-12-06
TAKATORI, ATSUO
Executed: 2007-11-22
Assignees
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU, TOKYO, 105-8001, JAPAN
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA, 211-8588, JAPAN
Covered Property (1)
Delay Fault Test Quality Calculation Apparatus, Delay Fault Test Quality Calculation Method, and Delay Fault Test Pattern Generation Apparatus
Patent: 8,185,863 →
Application: 13/243,070 →
Publication: US 2012/0016619
Related Assignments (5)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 26, 2011
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 027126/0246 →
Change of Name Oct 26, 2011
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 027129/0001 →
Assignment of Assignor's Interest Apr 5, 2016
From: KABUSHIKI KAISHA TOSHIBA; FUJITSU SEMICONDUCTOR LIMITED
To: KABUSHIKI KAISHA TOSHIBA; SOCIONEXT INC.
Reel/Frame 038197/0037 →
Change of Address Apr 5, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 038361/0492 →
Assignment of Assignor's Interest Jan 30, 2018
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 044762/0711 →