IP Library › Assignment 031576/0320
Patent Assignment
Reel/Frame 031576/0320

Assignment of Assignor's Interest

Recorded: 2013-11-11 Pages: 10
Assignor
NETHRA IMAGING, INC.
Executed: 2013-01-17
Assignee
METAGENCE TECHNOLOGIES LIMITED
GENESIS HOUSE, INNOVATION CENTRE & PINNACLE HOUSE, HOME PARK ESTATE, KINGS LANGLEY, HERTFORDSHIRE, WD4 8LZ, UNITED KINGDOM
Covered Properties (14)
Development System for an Integrated Circuit Having Standardized Hardware Objects
Patent: 7,139,985 →
Application: 10/871,311 →
Publication: US 2005/0055657
System of Hardware Objects
Patent: 7,865,637 →
Application: 10/871,329 →
Publication: US 2005/0015733
Data Interface Register Structure with Registers for Data, Validity, Group Membership Indicator, and Ready to Accept Next Member Signal
Patent: 7,206,870 →
Application: 10/871,347 →
Publication: US 2005/0005250
Asynchronous Communication Among Hardware Object Nodes in Ic with Receive and Send Ports Protocol Registers Using Temporary Register Bypass Select for Validity Information
Patent: 7,409,533 →
Application: 11/326,701 →
Publication: US 2006/0117275
System of Virtual Data Channels in an Integrated Circuit
Patent: 7,801,033 →
Application: 11/340,957 →
Publication: US 2007/0025382
Clock Generation for Multiple Clock Domains
Patent: 7,945,803 →
Application: 11/460,231 →
Publication: US 2007/0064852
Ic Comprising Network of Microprocessors Communicating Data Messages Along Asynchronous Channel Segments Using Ports Including Validity and Accept Signal Registers and with Split/Join Capability
Patent: 7,406,584 →
Application: 11/466,083 →
Publication: US 2006/0282812
Development System for an Integrated Circuit Having Standardized Hardware Objects
Patent: 7,673,275 →
Application: 11/466,337 →
Publication: US 2006/0282813
Interactive Debug System for Multiprocessor Array
Patent: 7,577,874 →
Application: 11/673,986 →
Publication: US 2007/0180323
Multi-Frequency Debug Network for a Multiprocessor Array
Patent: 7,805,638 →
Application: 11/676,206 →
Publication: US 2007/0180334
System for Reconfiguring a Processor Array
Patent: 8,103,866 →
Application: 12/018,062 →
Publication: US 2008/0229093
Directional Cross Hair Search System and Method for Determining a Preferred Motion Vector
Patent: 8,498,493 →
Application: 12/477,012 →
Video Non-Buffered Line Memory
Patent: 8,922,573 →
Application: 12/502,927 →
Method and System for Staggered Parallelized Video Decoding
Patent: 8,498,334 →
Application: 12/699,799 →
Related Assignments (4)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Feb 3, 2010
From: CHOUDHARY, SAIF
To: NETHRA IMAGING, INC.
Reel/Frame 023895/0065 →
Release of Security Interest Dec 18, 2012
From: SILICON VALLEY BANK
To: AMBRIC, INC.
Reel/Frame 029489/0598 →
Assignment of Assignor's Interest Nov 11, 2013
From: METAGENCE TECHNOLOGIES LIMITED
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 031576/0540 →
Security Interest Jul 31, 2024
From: IMAGINATION TECHNOLOGIES LIMITED
To: FORTRESS INVESTMENT GROUP (UK) LTD
Reel/Frame 068221/0001 →