IP Library Assignment 035255/0507
Patent Assignment
Reel/Frame 035255/0507

Assignment of Assignor's Interest

Recorded: 2015-03-25 Pages: 3
Assignors
YEW, TING
Executed: 2015-03-17
GUNARATNA, SENANI
Executed: 2015-03-17
SHARPE-GEISLER, BRAD
Executed: 2015-03-17
Assignee
LATTICE SEMICONDUCTOR CORPORATION
111 SW 5TH AV., PORTLAND, OREGON, 97204
Covered Property (1)
High Speed Complementary Nmos Lut Logic
Patent: 9,543,950 →
Application: 14/611,069 →
Publication: US 2016/0020767
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest Mar 24, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035309/0142 →
Security Interest May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
Release of Security Interest May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →