IP Library Assignment 039759/0101
Patent Assignment
Reel/Frame 039759/0101

Assignment of Assignor's Interest

Recorded: 2016-09-15 Pages: 11
Assignors
VADHAVKAR, SAMEER S.
Executed: 2014-07-09
LI, XIAO
Executed: 2014-07-09
GROOTHUIS, STEVEN K.
Executed: 2014-07-11
LI, JIAN
Executed: 2014-07-09
GANDHI, JASPREET S.
Executed: 2014-07-09
DERDERIAN, JAMES M.
Executed: 2014-07-09
HEMBREE, DAVID R.
Executed: 2014-07-09
Assignee
MICRON TECHNOLOGY, INC.
8000 S. FEDERAL WAY, P.O. BOX 6, BOISE, IDAHO, 83707-0006
Covered Property (1)
Stacked Semiconductor Die Assemblies with High Efficiency Thermal Paths and Associated Methods
Patent: 9,837,396 →
Application: 15/254,586 →
Publication: US 2016/0372452
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Supplement No. 2 to Patent Security Agreement Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041671/0902 →
Security Interest Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
Release of Security Interest Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050680/0268 →
Release of Security Interest Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →