IP Library Assignment 045016/0309
Patent Assignment
Reel/Frame 045016/0309

Assignment of Assignor's Interest

Recorded: 2018-02-23 Pages: 9
Assignors
WELLS, DAVID H.
Executed: 2018-02-02
KHANDEKAR, ANISH A.
Executed: 2018-02-21
SHROTRI, KUNAL
Executed: 2018-02-20
LIE, JIE
Executed: 2018-02-01
Assignee
MICRON TECHNOLOGY, INC.
8000 SOUTH FEDERAL WAY, MS 1- 525, BOISE, IDAHO, 83716
Covered Property (1)
Methods Of Forming A Channel Region Of A Transistor And Methods Used In Forming A Memory Array
Application: 15/903,280 →
Publication: US 2019/0198320
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
Supplement No. 9 to Patent Security Agreement Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
Release of Security Interest Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
Release of Security Interest Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →