IP Library › Assignment 045161/0532
Patent Assignment
Reel/Frame 045161/0532

Assignment of Assignor's Interest

Recorded: 2018-03-09 Pages: 8
Assignors
FARDAD, MANSOUR
Executed: 2017-11-01
VENKATA, HARISH N
Executed: 2017-11-01
KOELLING, JEFFREY
Executed: 2017-11-01
Assignee
MICRON TECHNOLOGY, INC.
8000 SO. FEDERAL WAY, BOISE, IDAHO, 83716-9632
Covered Property (1)
Peripheral Logic Circuits Under Dram Memory Arrays
Application: 15/802,016 →
Publication: US 2019/0131308
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Supplement No. 7 to Patent Security Agreement Feb 6, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 045267/0833 →
Security Interest Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
Release of Security Interest Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050716/0678 →
Release of Security Interest Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →