Patent Assignment
Reel/Frame 045758/0871
Assignment of Assignor's Interest
Recorded: 2018-05-09
Pages: 7
Assignors
WALDROP, WILLIAM C.
Executed: 2018-05-09
VANKAYALA, VIJAYAKRISHNA J.
Executed: 2018-05-09
SMITH, SCOTT E.
Executed: 2018-05-09
Assignee
MICRON TECHNOLOGY, INC.
8000 S. FEDERAL WAY, P.O. BOX 6, BOISE, IDAHO, 83707-0006
Covered Property
(1)
Methods for Parity Error Alert Timing Interlock and Memory Devices and Systems Employing the Same
Related Assignments
(5)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest
Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
Supplement No. 9 to Patent Security Agreement
Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
Release of Security Interest
Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
Release of Security Interest
Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
Assignment of Assignor's Interest
Oct 30, 2024
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 069075/0964 →