Patent Assignment
Reel/Frame 051334/0633
RELEASE OF SECURITY INTEREST
Recorded: 2019-12-19
Received: 2019-12-19
Pages: 6
Assignor
MUFG UNION BANK, N.A.
Executed: 2019-12-06
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134, UNITED STATES
Covered Applications
(18)
METHOD TO SEPERATE STORAGE REGIONS IN THE MIRROR BIT DEVICE
App. No. 13/156,122
→
FABRICATION METHOD FOR SEMICONDUCTOR DEVICE HAVING LAMINATED ELECTRONIC CONDUCTOR ON BIT LINE
App. No. 13/081,777
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SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
App. No. 13/026,075
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SEPERATION METHODS FOR SEMICONDUCTOR CHARGE ACCUMULATION LAYERS AND STRUCTURES THEREOF
App. No. 12/195,324
→
FABRICATION AND METHOD OF OPERATION OF MULTI-LEVEL MEMORY CELL ON SOI SUBSTRATE
App. No. 11/493,468
→
SEMICONDUCTOR DEVICE HAVING LAMINATED ELECTRONIC CONDUCTOR ON BIT LINE
App. No. 11/444,216
→
CHARGE SHARING TECHNIQUE DURING FLASH MEMORY PROGRAMMING
App. No. 11/229,530
→
MULTI-LEVEL ONO FLASH PROGRAM ALGORITHM FOR THRESHOLD WIDTH CONTROL
App. No. 11/034,642
→
SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
App. No. 10/649,994
→
METHOD OF IMPROVING DYNAMIC REFERENCE TRACKING FOR FLASH MEMORY UNIT
App. No. 10/357,879
→
NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD FOR CONTROLLING PROGRAMMING VOLTAGE OF NONVOLATILE SEMICONDUCTOR MEMORY
App. No. 10/259,761
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SYSTEM FOR PROGRAMMING A FLASH MEMORY DEVICE
App. No. 10/136,033
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CHARGE INJECTION
App. No. 10/050,483
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SOURCE SIDE SENSING SCHEME FOR VIRTUAL GROUND READ OF FLASH EPROM ARRAY WITH ADJACENT BIT PRECHARGE
App. No. 10/050,257
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SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
App. No. 09/973,743
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PROTECTING ACCESS TO MICROCONTROLLER MEMORY BLOCKS
App. No. 09/855,868
→
Data retention characteristics as a result of high temperature bake
App. No. 09/795,849
→
Data retention characteristics as a result of high temperature bake
App. No. 60/265,426
→