Patent Assignment
Reel/Frame 075221/0820
Assignment of Assignor's Interest
Recorded: 2026-03-23
Received: 2026-03-23
Pages: 41
Assignor
NXP USA, INC.
Executed: 2026-02-02
Assignee
STMICROELECTRONICS INTERNATIONAL N.V.
39, CHEMIN DU CHAMP-DES-FILLES, PLAN-LES-OUATES, GENEVA, CHX, 1228, SWITZERLAND
Covered Properties
(10)
Forming a Eutectic Bond Between a Wafer Having an Anti-Stiction Coating and a Cap Wafer
Application:
16/053,882 →
System Comprising a Mechanical Resonator and Method Therefor
Application:
15/662,771 →
Method of Integrating a Copper Plating Process in a Through-Substrate-via (Tsv) on Cmos Wafer
Application:
15/615,924 →
Method of Integrating a Copper Plating Process in a Through-Substrate-Via (TSV) on CMOS Wafer
Application:
15/209,964 →
Electrically Conductive Barriers for Integrated Circuits
Application:
14/832,924 →
Method of Bond Pad Protection During Wafer Processing
Application:
14/823,069 →
Systems and Methods for Anchoring Components in Mems Semiconductor Devices
Application:
14/805,924 →
Device with Vertically Integrated Sensors and Method of Fabrication
Application:
14/682,282 →
Accelerometer Calibration in a Rotating Member
Application:
14/501,276 →
Methods for Bonding Semiconductor Wafers
Application:
14/318,063 →