IP Library Granted Patent US 9,978,654
Granted Patent B2
US 9,978,654 · App. 13/832,449 · Granted May 22, 2018

Semiconductor device and method of forming dual-sided interconnect structures in Fo-WLCSP

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Quick Facts
Patent No.
US 9,978,654
App. No.
13/832,449
Filed
Mar 15, 2013
Granted
May 22, 2018
Kind
B2
Art Unit
2894
USPC
438/110
Abstract

A semiconductor device has a substrate including first and second conductive layers formed over first and second opposing surfaces of the substrate. A plurality of wire studs or stud bumps is formed over the substrate. A semiconductor die is mounted to the substrate between the wire studs. A first encapsulant is deposited around the semiconductor die. A first interconnect structure is formed over the semiconductor die and first encapsulant. A second encapsulant is deposited over the substrate, semiconductor die, and first interconnect structure. The second encapsulant can be formed over a portion of the semiconductor die and side surface of the substrate. A portion of the second encapsulant is removed to expose the substrate and first interconnect structure. A second interconnect structure is formed over the second encapsulant and first interconnect structure and electrically coupled to the wire studs. A discrete semiconductor device can be formed on the interconnect structure.

Claims (67)

1. A method of making a semiconductor device, comprising:

providing a substrate including a first conductive layer formed over a first surface of the substrate;

forming a plurality of wire studs over the first surface of the substrate;

disposing a semiconductor die over the first surface of the substrate between the wire studs including a first interconnect structure formed on an active surface of the semiconductor die opposite the substrate;

depositing a first encapsulant around the substrate, wire studs, semiconductor die, and first interconnect structure, wherein a portion of the first interconnect structure and first ends of the wire studs are exposed from the encapsulant; and

forming a second interconnect structure over a surface of the first encapsulant opposite the substrate and contacting the first interconnect structure and wire studs.

2. The method of claim 1 , further including:

forming a second encapsulant around the semiconductor die; and

forming the first interconnect structure over the semiconductor die and second encapsulant.

3. The method of claim 1 , further including removing a portion of the first encapsulant to expose the first interconnect structure and first ends of the wire studs.

4. The method of claim 1 , further including removing a portion of the first encapsulant from over the substrate opposite the semiconductor die.

5. The method of claim 1 , further including forming the first encapsulant over a portion of the semiconductor die.

6. The method of claim 1 , further including depositing the first encapsulant to cover the first surface of the substrate and a side surface of the substrate approximately perpendicular to the first surface of the substrate.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming a vertical interconnect structure over a first surface of the substrate;

disposing a semiconductor die over the first surface of the substrate with an active surface of the semiconductor die oriented away from the substrate and including a first conductive layer formed over the active surface prior to disposing the semiconductor die over the first surface of the substrate;

depositing a first encapsulant over the substrate, semiconductor die, and vertical interconnect structure, wherein the vertical interconnect structure and first conductive layer are exposed at a surface of the first encapsulant opposite the substrate; and

forming a second interconnect structure over the first encapsulant after depositing the first encapsulant and contacting the first conductive layer and the vertical interconnect structure.

8. The method of claim 7 , wherein the substrate includes a second conductive layer with the vertical interconnect structure formed on the second conductive layer.

9. The method of claim 7 , further including:

depositing a second encapsulant around the semiconductor die; and

forming a build-up interconnect structure over the semiconductor die and second encapsulant, wherein the build-up interconnect structure includes the first conductive layer.

10. The method of claim 7 , further including removing a portion of the first encapsulant from over the first conductive layer to expose the first conductive layer from the first encapsulant.

11. The method of claim 7 , further including removing the portion of the first encapsulant by planarizing the first encapsulant.

12. The method of claim 7 , further including forming the first encapsulant over a portion of the semiconductor die.

13. The method of claim 7 , wherein the vertical interconnect structure includes a wire stud.

14. A method of making a semiconductor device, comprising:

forming a first interconnect structure;

providing a semiconductor die;

forming a protection layer over the semiconductor die;

disposing the semiconductor die over a first surface of the first interconnect structure after forming the first interconnect structure;

forming a plurality of stud bumps over the first surface of the first interconnect structure;

depositing an encapsulant over the first interconnect structure, semiconductor die, and stud bumps with the stud bumps exposed from the encapsulant;

removing the protection layer from over the semiconductor die after depositing the encapsulant; and

forming a second interconnect structure over the encapsulant, the stud bumps, and the semiconductor die to electrically connect the stud bumps and semiconductor die.

15. The method of claim 14 , further including disposing a discrete semiconductor device over the first interconnect structure.

16. The method of claim 14 , wherein forming the first interconnect structure includes:

forming a first insulating layer;

forming a conductive layer over the first insulating layer; and

forming a second insulating layer over the first insulating layer and conductive layer.

17. The method of claim 16 , further including removing a portion of the second insulating layer by laser direct ablation.

18. The method of claim 16 , further including forming a third insulating layer over the second insulating layer and conductive layer.

19. The method of claim 14 , wherein forming the second interconnect structure includes:

forming a first insulating layer over the encapsulant and semiconductor die;

forming a first conductive layer over the first insulating layer;

forming a second insulating layer over the first insulating layer and first conductive layer;

forming a second conductive layer over the second insulating layer and first conductive layer; and

forming a third insulating layer over the second insulating layer and second conductive layer.

20. A method of making a semiconductor device, comprising:

providing a substrate;

forming a wire stud on a first surface of the substrate;

disposing a semiconductor die on the first surface of the substrate;

depositing an encapsulant over the semiconductor die, wire stud, and substrate;

removing a portion of the encapsulant from over the semiconductor die and wire stud;

forming a first interconnect structure over the encapsulant with the first interconnect structure physically contacting the wire stud and electrically connected to the semiconductor die;

forming a protection layer over the semiconductor die prior to depositing the encapsulant;

removing the protection layer after depositing the encapsulant; and

forming the first interconnection structure after removing the protection layer.

21. The method of claim 20 , wherein the substrate further includes a second interconnect structure.

22. The method of claim 20 , further including removing a second portion of the encapsulant from over the substrate opposite the semiconductor die.

23. The method of claim 20 , further including:

singulating the substrate;

disposing the substrate over a carrier with the semiconductor die oriented toward the carrier after singulating the substrate;

depositing the encapsulant over the substrate and carrier; and

removing the carrier after depositing the encapsulant.

24. The method of claim 23 , further including depositing the encapsulant to completely cover the substrate and carrier.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064809/0877 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0391 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2013
From: LIN, YAOJIAN; CHEN, KANG
To: STATS CHIPPAC, LTD.
Reel/Frame 030009/0440 →