SOI semiconductor configuration and method of fabricating the same
A semiconductor configuration has a base layer made of semiconductor material and formed, in particular, by a substrate. An insulation layer is arranged above the base layer, and a layer made of monocrystalline silicon adjoins the insulation layer. A passivating substance is present, with the formation of Si—X bonds, in the region of the interface between the insulation layer and the monocrystalline silicon layer. The bond energy of the Si—X bond is greater than the bond energy of an Si—H bond.
1. A method of fabricating a semiconductor configuration, which comprises the following steps:
fabricating a semiconductor structure having a base layer, an insulation layer, a monocrystalline silicon layer, and an interface between the insulation layer and the monocrystalline silicon layer;
placing a passivating substance X into the monocrystalline silicon layer, during or after the fabrication of the semiconductor structure; and
heat-treating the semiconductor structure with the passivating substance X for causing the passivating substance X in the monocrystalline silicon layer to diffuse both to the interface and to a surface of the monocrystalline silicon layer opposite to the interface.
2. The method according to claim 1 , wherein the introducing step comprises ion-implanting the passivating substance X.
3. The method according to claim 2 , wherein the introducing step is performed such that there is an implantation concentration maximum for the passivating substance X in the vicinity of the interface.
4. The method according to claim 1 , wherein the fabricating of the semiconductor structure comprises the following steps:
providing two silicon semiconductor substrates;
oxidizing and forming a respective oxide layer on the two silicon semiconductor substrates;
joining the two silicon semiconductor substrates by contacting the two oxide layers; and
partially removing one of the silicon semiconductor substrates and forming the monocrystalline silicon layer.
5. The method according to claim 1 , which comprises forming a covering oxide layer on the monocrystalline silicon layer.
6. The method according to claim 1 , which comprises patterning the monocrystalline silicon layer by etching away regions thereof down to the underlying insulation layer.
7. The method according to claim 6 , wherein the patterning step is performed before the step of introducing the passivating substance X into one of an insulation layer and the monocrystalline silicon layer.
8. The method according to claim 6 , wherein the patterning step is performed after the step of introducing the passivating substance X into one of the insulation layer and the monocrystalline silicon layer.
9. The method according to claim 1 , which comprises:
doping the monocrystalline silicon layer differently region by region by ion implantation; and
performing the doping step after the step of introducing the passivating substance X and the heat-treating step.
10. The method according to claim 6 , wherein the step of introducing a passivating substance X into the monocrystalline silicon layer is performed such that an implanted dose of the passivating substance X is below an amorphizing dose of silicon.