IP Library Granted Patent US 7,424,383
Granted Patent B2
US 7,424,383 · App. 09/778,837 · Granted Sep 9, 2008

Abnormality detection device for detecting an abnormality in a communication bus

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Quick Facts
Patent No.
US 7,424,383
App. No.
09/778,837
Granted
Sep 9, 2008
Kind
B2
Abstract

An abnormality detection device detects an abnormality in a communication bus. The abnormality detection device comprises a timer counter connected to the communication bus so as to measure a time during which a signal having a first logical level is transmitted in the communication bus, and a comparator outputting an abnormality detection signal indicating an abnormality in the communication bus when the time measured by the timer counter surpasses a threshold value.

Claims (28)

1. An abnormality detection device for detecting an abnormality in a communication bus, the device comprising:

a timer counter configured to measure a time during which a logical output of said communication bus remains at a first logical level which is a high level or a low level;

a comparator configured to compare the time measured by said timer counter with a threshold value and to output an abnormality detection signal indicating an abnormality in said communication bus when the time surpasses said threshold value, wherein the abnormality detection device is independent of a CPU controlling the communication bus and detects the abnormality directly from the communication bus;

a plurality of comparison value registers respectively configured to store a plurality of threshold values; and

a selector configured to store a threshold value from among said plurality of said threshold values according to a selection signal supplied thereto so as to supply said threshold value to said comparator.

2. The abnormality detection device as claimed in claim 1 , wherein said timer counter is initialized at intervals determined according to an event signal supplied thereto.

3. The abnormality detection device as claimed in claim 2 , comprising at least two units of said timer counter and said comparator, the timer counter in each of said units being individually initialized at said intervals.

4. The abnormality detection device as claimed in claim 1 , wherein the abnormality detector device detects the abnormality directly from the communication bus by hardware.

5. An abnormality detection device for detecting an abnormality in a communication bus, the device comprising:

at least two timer counters each configured to measure a time during which a signal transmitted through said communication bus continues to be a first logical level;

a register configured to cumulatively add the time measured by at least one of said at least two timer counters, the register being initialized at predetermined intervals; and

a comparator configured to compare the time cumulatively added by said register with a threshold value and to output an abnormality detection signal indicating an abnormality in said communication bus when the cumulative time obtained by said register surpasses said threshold value, wherein the abnormality detection device is independent of a CPU controlling the communication bus and detects the abnormality directly from the communication bus.

6. The abnormality detection device as claimed in claim 5 ,

wherein said register supplies said cumulative time to at least one of said at least two timer counters, and

said at least one of said at least two timer counters measures the time by using said cumulative time as an initial value.

7. The abnormality detection device as claimed in claim 5 , which detects the abnormality directly from the communication bus by hardware.

8. An abnormality detection device to detect an abnormality in a communication bus, the device comprising:

at least two timer counters each configured to measure a time during which a signal transmitted through said communication bus continues to be a first logical level;

a register configured to cumulatively add the time measured by at least one of said at least two timer counters, the register being initialized at predetermined intervals; and

a comparator configured to compare the time cumulatively added by said register with a threshold value and to output an abnormality detection signal indicating an abnormality in said communication bus when the cumulative time obtained by said register surpasses said threshold value,

wherein said register supplies said cumulative time to at least one of said at least two timer counters, and

said at least one of said at least two timer counters measures the time by using said cumulative time as an initial value.

9. An abnormality detection device to detect an abnormality in a communication bus, comprising:

at least two timer counters each configured to measure a time during which a signal transmitted through said communication bus continues to be a first logical level;

a circuit configured to cumulatively add the time measured by at least one of said at least two timer counters; and

a comparator configured to compare the time cumulatively added by said circuit with a threshold value and to output an abnormality detection signal indicating an abnormality in said communication bus when the cumulative time obtained by said circuit surpasses said threshold value,

wherein said circuit supplies said cumulative time to at least one of said at least two timer counters, and

said at least one of said at least two timer counters measures the time by using said cumulative time as an initial value.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036039/0406 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →