IP Library › Granted Patent US 7,214,295
Granted Patent B2
US 7,214,295 · App. 09/829,169 · Granted May 8, 2007

Method for tantalum pentoxide moisture barrier in film resistors

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Quick Facts
Patent No.
US 7,214,295
App. No.
09/829,169
Granted
May 8, 2007
Kind
B2
Abstract

The present invention discloses a method of manufacturing a thin film resistor with a moisture barrier by depositing a metal film layer on a substrate and depositing a layer of tantalum pentoxide film overlaying the metal film layer. The present invention also includes a thin film resistor having a substrate; a metal film layer attached to the substrate; and a tantalum pentoxide layer overlaying the metal film layer, the tantalum pentoxide layer providing a barrier to moisture, the tantalum pentoxide layer not overlaid by an oxidation process.

Claims (23)

1. A method of manufacturing thin film resistors comprising: forming a plurality of discrete component thin film chip resistors, each of the plurality formed by:

(a) depositing a non-tantalum metal film resistive layer on a thin film resistor substrate;

(b) attaching a thin film resistor termination on each end of the metal film resistive layer; and

(c) depositing an outer moisture barrier consisting of tantalum pentoxide directly overlaying and contacting the metal film resistive layer to form one of the plurality of thin film chip resistors wherein the moisture barrier is formed from deposition of the tantalum pentoxide and not through oxidation of tantalum and wherein the outer moisture barrier reduces failures due to electrolytic corrosion under powered moisture conditions;

exposing selected thin film chip resistors to powered moisture conditions;

observing failures due to electrolytic corrosion under powered moisture conditions in the selected thin film chip resistors.

2. The method of claim 1 wherein the step of depositing a layer of tantalum pentoxide is sputtering tantalum pentoxide film.

3. The method of claim 1 wherein the metal film layer is an alloy containing nickel.

4. The method of claim 1 wherein the metal film layer is an alloy containing chromium.

5. The method of claim 1 wherein the metal film layer is a nickel-chromium alloy.

6. A method of manufacturing thin film chip resistors comprising:

forming a plurality of discrete component thin film chip resistors, each of the plurality formed by:

(a) depositing a non-tantalum metal film resistive layer on a substrate;

(b) attaching a termination on each end of the metal film resistive layer;

(c) depositing a passivation layer directly overlaying and contacting the metal film layer; and

(d) depositing an outer moisture barrier consisting of tantalum pentoxide directly overlaying and contacting the passivation layer to form one of the plurality of thin film chip resistors, wherein the moisture barrier is formed from deposition of the tantalum pentoxide and not through oxidation of tantalum;

exposing selected thin film chip resistors from the plurality of thin film chip resistors to powered moisture conditions;

observing failure due to electrolytic corrosion under powered moisture conditions in the selected thin film chip resistors.

7. A method of manufacturing a discrete component thin film chip resistor, comprising:

depositing a non-tantalum metal film resistive element on a thin film resistor substrate; attaching a thin film resistor termination on each end of the non-tantalum metal film resistive element;

depositing an outer moisture barrier consisting of tantalum pentoxide directly overlaying and contacting the non-tantalum metal film resistive element;

wherein the moisture barrier is formed from deposition of the tantalum pentoxide and not through oxidation of tantalum;

wherein the outer moisture barrier reduces failures due to electrolytic corrosion under powered moisture conditions.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jul 17, 2019
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.; VISHAY TECHNO COMPONENTS, LLC; VISHAY EFI, INC.; VISHAY VITRAMON, INC.; SPRAGUE ELECTRIC COMPANY
Reel/Frame 049826/0312 →
SECURITY AGREEMENT Recorded Jan 21, 2011
From: VISHAY INTERTECHNOLOGY, INC.; VISHAY DALE ELECTRONICS, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 025675/0001 →
RELEASE OF SECURITY INTEREST Recorded Dec 14, 2010
From: COMERICA BANK, AS AGENT, A TEXAS BANKING ASSOCIATION (FORMERLY A MICHIGAN BANKING CORPORATION)
To: VISHAY SPRAGUE, INC., SUCCESSOR-IN-INTEREST TO VISHAY EFI, INC. AND VISHAY THIN FILM, LLC, A DELAWARE CORPORATION; VISHAY DALE ELECTRONICS, INC., A DELAWARE CORPORATION; VISHAY INTERTECHNOLOGY, INC., A DELAWARE CORPORATION; SILICONIX INCORPORATED, A DELAWARE CORPORATION; VISHAY MEASUREMENTS GROUP, INC., A DELAWARE CORPORATION; VISHAY GENERAL SEMICONDUCTOR, LLC, F/K/A GENERAL SEMICONDUCTOR, INC., A DELAWARE LIMITED LIABILITY COMPANY; VISHAY VITRAMON, INCORPORATED, A DELAWARE CORPORATION; YOSEMITE INVESTMENT, INC., AN INDIANA CORPORATION
Reel/Frame 025489/0184 →
SECURITY AGREEMENT Recorded Mar 2, 2010
From: VISHAY SPRAGUE, INC., SUCCESSOR IN INTEREST TO VISHAY EFI, INC. AND VISHAY THIN FILM, LLC; VISHAY DALE ELECTRONICS, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY MEASUREMENTS GROUP, INC.
To: COMERICA BANK, AS AGENT
Reel/Frame 024006/0515 →