Patent Assignment
Reel/Frame 024006/0515
Security Agreement
Recorded: 2010-03-02
Pages: 57
Assignors
VISHAY SPRAGUE, INC., SUCCESSOR IN INTEREST TO VISHAY EFI, INC. AND VISHAY THIN FILM, LLC
Executed: 2010-02-12
VISHAY DALE ELECTRONICS, INC.
Executed: 2010-02-12
VISHAY INTERTECHNOLOGY, INC.
Executed: 2010-02-12
SILICONIX INCORPORATED
Executed: 2010-02-12
VISHAY MEASUREMENTS GROUP, INC.
Executed: 2010-02-12
Assignee
COMERICA BANK, AS AGENT
39200 W. SIX MILE ROAD, LIVONIA, MICHIGAN, 48152
Covered Properties
(309)
Vertical Current Flow Field Effect Transistor
Patent:
5,164,325 →
Application:
07/107,725 →
Lightly Doped Drain Mosfet with Reduced On-Resistance
Patent:
5,237,193 →
Application:
07/210,959 →
Complementary, Isolated Dmos Ic Technology
Patent:
5,156,989 →
Application:
07/268,839 →
Gold Diffusion Thin Film Resistors and Process
Patent:
5,023,589 →
Application:
07/404,590 →
Method of Fabricating a Short-Channel Low Voltage Dmos Transistor
Patent:
4,931,408 →
Application:
07/420,971 →
Optimization of Bv and Rds-on by Graded Doping in Ldd and Other High Voltage Ic
Patent:
5,132,753 →
Application:
07/498,170 →
Method for Making a Lead Frame with Fuse and Product Made Thereby
Patent:
5,011,067 →
Application:
07/500,351 →
Thermistor
Patent:
5,160,912 →
Application:
07/579,362 →
Laser-Formed Electrical Component and Method for Making Same
Patent:
5,091,286 →
Application:
07/587,761 →
Closed Cell Transistor with Built-in Voltage Clamp
Patent:
5,136,349 →
Application:
07/597,118 →
Fuzed Solid Electrolyte Capacitor
Patent:
5,099,397 →
Application:
07/677,203 →
Molded Fuzed Solid Electrolyte Capacitor
Patent:
5,053,927 →
Application:
07/677,204 →
Method for Fabricating a High Voltage Mos Transistor
Patent:
5,132,235 →
Application:
07/678,578 →
Electrical Resistors and Methods of Making Same
Patent:
5,206,623 →
Application:
07/695,044 →
Lightly-Doped Drain Mosfet with Improved Breakdown Characteristics
Patent:
5,386,136 →
Application:
07/697,356 →
Trench Dmos Power Transistor with Field-Shaping Body Profile and Three-Dimensional Geometry
Patent:
5,298,442 →
Application:
07/762,103 →
Mos Transistor with a Charge Induced Drain Extension
Patent:
5,243,212 →
Application:
07/802,352 →
Touch Panel and Method for Controlling Same
Patent:
5,179,369 →
Application:
07/806,143 →
High Voltage Mos Transistor with Reduced Parasitic Current Gain
Patent:
5,218,228 →
Application:
07/849,723 →
Threshold Adjustment in Fabricating Vertical Dmos Devices
Patent:
5,248,627 →
Application:
07/854,162 →
Driver Circuit for Sinking Current to Two Supply Voltages
Patent:
5,296,765 →
Application:
07/855,377 →
Bulk Metal Chip Resistor
Patent:
5,287,083 →
Application:
07/860,403 →
Power Device with Buffered Gate Shield Region
Patent:
5,430,314 →
Application:
07/873,423 →
Low on-Resistance Power Mos Technology
Patent:
5,304,831 →
Application:
07/881,589 →
Monolythic Multilayer Chip Inductor and Method for Making Same
Patent:
5,302,932 →
Application:
07/881,856 →
Isolated Dmos Ic Technology
Patent:
5,485,027 →
Application:
07/904,402 →
Vertical Current Flow Field Effect Transistor with Thick Insulator Over Non-Channel Areas
Patent:
5,298,781 →
Application:
07/910,864 →
Field Effect Trench Transistor Having Lightly Doped Epitaxial Region on the Surface Portion Thereof
Patent:
5,910,669 →
Application:
07/918,954 →
High Voltage Transistor Having Edge Termination Utilizing Trench Technology
Patent:
5,430,324 →
Application:
07/918,996 →
Trenched Dmos Transistor Fabrication Using Six Masks
Patent:
5,316,959 →
Application:
07/928,909 →
Low Temperature Oxide Layer Over Field Implant Mask
Patent:
5,328,866 →
Application:
07/949,288 →
Method of Making Vertical Current Flow Field Effect Transistor
Patent:
5,576,245 →
Application:
07/978,201 →
Bicmos Structure
Patent:
5,422,508 →
Application:
08/026,930 →
Method for Forming a Bicdmos
Patent:
5,374,569 →
Application:
08/026,932 →
Short Channel Trenched Dmos Transistor
Patent:
5,341,011 →
Application:
08/031,798 →
Lightly-Doped Drain Mosfet with Improved Breakdown Characteristics
Patent:
5,374,843 →
Application:
08/040,684 →
Method for Reducing on Resistance and Improving Current Characteristics of a Mosfet
Patent:
5,306,656 →
Application:
08/046,058 →
Dmos Power Transistors with Reduced Number of Contacts Using Integrated Body-Source Connections
Patent:
5,410,170 →
Application:
08/047,723 →
Threshold Adjustment in Vertical Dmos Devices
Patent:
5,465,000 →
Application:
08/062,370 →
Disconnect Switch Circuit to Power Head Retract in Hard Disk Drive Memories
Patent:
5,508,874 →
Application:
08/062,503 →
Push-Pull Output Stage for Driving Motors Which Generates Auxiliary Voltage Supply
Patent:
5,377,094 →
Application:
08/062,504 →
Contact Geometry for Improved Lateral Mosfet
Patent:
5,412,239 →
Application:
08/062,507 →
Head-Retract Circuit for Moving Media Storage Apparatus
Patent:
5,455,496 →
Application:
08/062,968 →
Apparatus for Generating Positive and Negative Supply Rails from Operating Motor Control Circuit
Patent:
5,459,654 →
Application:
08/062,969 →
Floating Drive Technique for Reverse Battery Protection
Patent:
5,539,610 →
Application:
08/067,365 →
Junction-Isolated Floating Diode
Patent:
5,414,292 →
Application:
08/067,372 →
Structure and Fabrication of Power Mosfets, Including Termination Structures
Patent:
5,404,040 →
Application:
08/096,135 →
Metal Crossover in High Voltage Ic with Graduated Doping Control
Patent:
5,426,325 →
Application:
08/101,886 →
Low Threshold Voltage Epitaxial Dmos Technology
Patent:
5,479,037 →
Application:
08/131,114 →
Bidirectional Current Blocking Mosfet for Battery Disconnect Switching
Patent:
5,536,977 →
Application:
08/159,900 →
Bidirectional Blocking Lateral Mosfet with Improved On-Resistance
Patent:
5,420,451 →
Application:
08/160,539 →
Gate Drive Technique for a Bidirectional Blocking Lateral Mosfet
Patent:
5,510,747 →
Application:
08/160,560 →
Low on-Resistance Power Mos Technology
Patent:
5,429,964 →
Application:
08/180,265 →
Method of Making Bicdmos Structures
Patent:
5,416,039 →
Application:
08/225,270 →
Bicdmos Structures
Patent:
5,426,328 →
Application:
08/226,419 →
Low Temperature Oxide Layer Over Field Implant Mask
Patent:
5,439,842 →
Application:
08/236,299 →
Method of Making Power Device with Buffered Gate Shield Region
Patent:
5,445,978 →
Application:
08/242,519 →
Trenched Dmos Transistor with Channel Block at Cell Trench Corners
Patent:
5,468,982 →
Application:
08/253,527 →
Reliability Test Method for Semiconductor Trench Devices
Patent:
5,486,772 →
Application:
08/268,755 →
Threshold Adjustment in Field Effect Semiconductor Devices
Patent:
5,648,288 →
Application:
08/281,314 →
Method for Fabricating a Short Channel Trenched Dmos Transistor
Patent:
5,474,943 →
Application:
08/289,358 →
Voltage Converter with Frequency Shift Protection Against Overload Current
Patent:
5,528,483 →
Application:
08/295,271 →
Method of Making Lightly-Doped Drain Dmos with Improved Breakdown Characteristics
Patent:
5,514,608 →
Application:
08/318,027 →
Bidirectinal Blocking Lateral Mosfet with Improved On-Resistance
Patent:
5,451,533 →
Application:
08/318,323 →
Bicdmos Process Technology
Patent:
5,559,044 →
Application:
08/323,950 →
Protective Circuit for Protecting Load Against Excessive Input Voltage
Patent:
5,585,991 →
Application:
08/325,860 →
Electrostatic Discharge Protection Device for Integrated Circuit
Patent:
5,545,909 →
Application:
08/326,172 →
Voltage Regulator Having Improved Stability
Patent:
5,559,424 →
Application:
08/326,408 →
Flyback Power Converter with Spike Compensator Circuit
Patent:
5,517,397 →
Application:
08/350,521 →
Surface Mount Resistor and Method for Making Same
Patent:
5,604,477 →
Application:
08/350,960 →
Structure and Fabrication of Power Mosfets, Including Termination Structures
Patent:
5,521,409 →
Application:
08/362,674 →
Lateral Power Mosfet Having Metal Strap Layer to Reduce Distributed Resistance
Patent:
5,767,546 →
Application:
08/367,388 →
Vertical Power Mosfet Having Thick Metal Layer to Reduce Distributed Resistance
Patent:
5,665,996 →
Application:
08/367,486 →
Low-Side Bidirectional Battery Disconnect Switch
Patent:
5,689,209 →
Application:
08/367,515 →
Trench Field Effect Transistor with Reduced Punch-Through Susceptibility and Low Rdson
Patent:
5,558,313 →
Application:
08/386,895 →
Band Gap Voltage Compensation Circuit
Patent:
5,596,265 →
Application:
08/388,535 →
Output Control Circuit for a Voltage Regulator
Patent:
5,506,496 →
Application:
08/389,705 →
Punch-Through Field Effect Transistor
Patent:
5,592,005 →
Application:
08/415,009 →
Method for Making Termination Structure for Power Mosfet
Patent:
5,597,765 →
Application:
08/423,588 →
Method of Making a Trench Mosfet with Multi-Resistivity Drain to Provide Low on-Resistance by Varying Dopant Concentration in Epitaxial Layer
Patent:
5,674,766 →
Application:
08/429,414 →
Method for Fabricating High Voltage Transistor Having Trenched Termination
Patent:
5,605,852 →
Application:
08/444,336 →
Surface Mount and Flip Chip Technology for Total Integrated Circuit Isolation
Patent:
5,753,529 →
Application:
08/444,660 →
Method of Making a Field Effect Trench Transistor Having Lightly Doped Epitaxial Region on the Surface Portion Thereof
Patent:
5,532,179 →
Application:
08/447,484 →
Voltage-Clamped Power Accumulation-Mode Mosfet
Patent:
5,856,692 →
Application:
08/459,054 →
Bidirectional Blocking Accumulation-Mode Trench Power Mosfet
Patent:
5,661,322 →
Application:
08/459,559 →
Method for Forming a Lateral Mos Transistor Having Lightly Doped Drain Formed Along with Other Transistors in the Same Substrate
Patent:
5,541,125 →
Application:
08/463,165 →
Mos Transistor Having Adjusted Threshold Voltage Formed Along with Other Transistors
Patent:
5,618,743 →
Application:
08/463,417 →
Method for Forming a Bipolar Transistor Having Selected Breakdown Voltage
Patent:
5,541,123 →
Application:
08/463,647 →
Pmos Transistors with Different Breakdown Voltages Formed in the Same Substrate
Patent:
5,583,061 →
Application:
08/464,435 →
Method for Forming a Zener Diode Region and an Isolation Region
Patent:
5,547,880 →
Application:
08/464,978 →
Methodfor Forming a Elecrostatic Discharge Protection Device for Ineg- Rated Circuit
Patent:
5,677,205 →
Application:
08/472,943 →
Method of Forming a Lateral Field Effect Transistor Having Reduced Drain-to-Source On-Resistance
Patent:
5,750,416 →
Application:
08/479,308 →
Pwm Multiplexed Solenoid Driver
Patent:
5,621,604 →
Application:
08/480,469 →
Threshold Adjustment in Field Effect Semiconductor Devices
Patent:
5,726,477 →
Application:
08/482,341 →
Method of Making a Trench Mosfet with Heavily Doped Delta Layer to Provide Low On-Resistance
Patent:
5,688,725 →
Application:
08/482,357 →
Electrostatic Discharge Protection Device for Integrated Circuit
Patent:
5,654,574 →
Application:
08/486,280 →
Gas-Based Substrate Deposition Protection
Patent:
5,925,411 →
Application:
08/487,789 →
High Density Trenched Dmos Transistor
Patent:
5,689,128 →
Application:
08/533,814 →
Trenched Dmos Transistor with Buried Layer for Reduced on-Resistance and Ruggedness
Patent:
5,629,543 →
Application:
08/537,157 →
Switching Device Including Poer Mosfet with Internal Power Supply Circuit
Patent:
5,726,594 →
Application:
08/538,105 →
Bidirectional Current Blocking Mosfet for Battery Disconnect Switching Including Protection Against Reverse Connected Battery Charger
Patent:
5,682,050 →
Application:
08/541,345 →
Multiple Gated Mosfet for Use in Dc-Dc Converter
Patent:
5,616,945 →
Application:
08/542,611 →
Separate Circuit Devices in an Intra-Package Configuration and Assembly Techniques
Patent:
6,066,890 →
Application:
08/556,369 →
Bidirectional Blocking Lateral Mosfet with Improved On-Resistance
Patent:
5,612,566 →
Application:
08/569,334 →
Low Voltage Mosfet with Low on-Resistance and High Breakdown Voltage
Patent:
5,939,752 →
Application:
08/570,876 →
Quiet Commutation Circuit for an Electric Motor
Patent:
5,825,145 →
Application:
08/573,802 →
Closed-Loop Frequency-to-Current Converter with Integrable Capacitances
Patent:
5,736,879 →
Application:
08/594,676 →
Commutation Delay Generator for a Multiphase Brushless Dc Motor
Patent:
5,767,643 →
Application:
08/595,812 →
Trenched Dmos Transistor Fabrication Using Seven Masks and Having Thick Termination Region Oxide
Patent:
5,639,676 →
Application:
08/603,047 →
Surface Mount and Flip Chip Technology for Total Integrated Circuit Isolation
Patent:
5,757,081 →
Application:
08/603,512 →
Trenched Dmos Transistor with Lightly Doped Tub
Patent:
5,821,583 →
Application:
08/610,563 →
Rapid Charging Technique for Lithium Ion Batteries
Patent:
5,670,862 →
Application:
08/615,517 →
Vertical Power Mosfet Having Reduced Sensitivity to Variations in Thickness of Epitaxial Layer
Patent:
5,814,858 →
Application:
08/616,393 →
Trenched Dmos Transistor Having Thick Field Oxide in Termination Region
Patent:
5,578,851 →
Application:
08/625,639 →
Edge Termination Structure for Power Mosfet
Patent:
5,614,751 →
Application:
08/632,052 →
Surface Mount and Flip Chip Technology with Diamond Film Passivation for Total Integrated Circuit Isolation
Patent:
5,767,578 →
Application:
08/634,957 →
Gate Drive Technique for a Bidirectional Blocking Lateral Mosfet
Patent:
5,731,732 →
Application:
08/636,258 →
Method of Blocking Biderectional Flow of Current
Patent:
5,747,891 →
Application:
08/636,367 →
Fabrication of High-Density Trench Dmos Using Sidewall Spacers
Patent:
5,904,525 →
Application:
08/646,593 →
Method for Forming an Isolation Structure and a Bipolar Transistor on a Semiconductor Substrate
Patent:
5,648,281 →
Application:
08/647,073 →
Three-Terminal Power Mosfet Switch for Use as Synchronous Rectifier or Voltage Clamp
Patent:
5,744,994 →
Application:
08/648,266 →
Pseudo-Schottky Diode
Patent:
5,818,084 →
Application:
08/648,334 →
Four-Terminal Power Mosfet Switch Having Reduced Threshold Voltage and On-Resistance
Patent:
5,689,144 →
Application:
08/649,747 →
Long Channel Trench-Gated Power Mosfet Having Fully Depleted Body Region
Patent:
5,998,834 →
Application:
08/651,232 →
Trench Field Effect Transistor with Reduced Punch-Through Susceptibility and Low Rdson
Patent:
5,981,344 →
Application:
08/658,115 →
Monolithic Thick Film Inductor
Patent:
5,986,533 →
Application:
08/665,788 →
Method for Fabricating an Mos Capacitor Using Zener Diode Region
Patent:
5,643,820 →
Application:
08/667,219 →
Trench Mosfet with Multi-Resistivity Drain to Provide Low On-Resistance
Patent:
5,895,952 →
Application:
08/701,035 →
Synchronous Current Sharing Pulse Width Modulator
Patent:
5,808,453 →
Application:
08/701,114 →
Zener Diodes on the Same Wafer with Bicdmos Structures
Patent:
5,751,054 →
Application:
08/705,910 →
Apparatus and Method for Conformally Coating a Capacitor
Patent:
5,888,590 →
Application:
08/710,364 →
Low Profile Inductor/Transformer Component
Patent:
5,760,669 →
Application:
08/736,333 →
Trenched Field Effect Transistor with Pn Depletion Barrier
Patent:
5,917,216 →
Application:
08/742,326 →
Method of Fabricating a Field Effect Transistor
Patent:
6,090,716 →
Application:
08/767,708 →
Dmos Power Transistor with Reduced Number of Contacts Using Integrated Body-Source Connections
Patent:
5,866,931 →
Application:
08/777,636 →
Vertical Power Mosfet Having Thick Metal Layer to Reduce Distributed Resistance
Patent:
6,066,877 →
Application:
08/779,176 →
Doped Sintered Tantalum Pellets with Nitrogen in a Capacitor
Patent:
5,825,611 →
Application:
08/790,293 →
Low-Side Bidirectional Battery Disconnect Switch
Patent:
6,590,440 →
Application:
08/800,972 →
Multiple Gated Mosfet for Use in Dc-Dc Converter
Patent:
5,973,367 →
Application:
08/828,474 →
Trench-Gated Schottky Diode with Integral Clamping Diode
Patent:
6,078,090 →
Application:
08/832,012 →
Trench-Gated Power Mosfet with Protective Diode
Patent:
5,998,836 →
Application:
08/846,688 →
Trench Dmos Power Transistor with Field-Shaping Body Profile and Three-Dimensional Geometry
Patent:
6,627,950 →
Application:
08/851,608 →
Method of Forming Electrostatic Discharge Protection Device for Integrated Circuit
Patent:
5,877,534 →
Application:
08/873,781 →
Method of Makng Monolithic Thick Film Inductor
Patent:
5,970,604 →
Application:
08/881,480 →
Bidirectional Trench Gated Power Mosfet with Submerged Body Bus Extending Underneath Gate Trench
Patent:
5,877,538 →
Application:
08/884,826 →
Method of Making Low Threshold Voltage Epitaxial Dmos Technology
Patent:
5,770,503 →
Application:
08/895,004 →
Trench Mosfet with Heavily Doped Delta Layer to Provide Low on Resistance
Patent:
6,008,520 →
Application:
08/895,497 →
Safety Switch for Lithium Ion Battery
Patent:
5,909,103 →
Application:
08/899,001 →
Method and Apparatus for Providing Gate Drive Voltage to Switching Device
Patent:
5,909,139 →
Application:
08/907,216 →
Integrated Circuit Die Having Thick Bus to Reduce Distributed Resistance
Patent:
5,945,709 →
Application:
08/907,276 →
High Self Resonant Frequency Multilayer Inductor and Method for Making Same
Patent:
5,880,662 →
Application:
08/915,875 →
Low Resistance Power Mosfet or Other Device Containing Silicon-Germanium Layer
Patent:
6,239,463 →
Application:
08/919,386 →
Trench- Gated Power Mosfet with Protective Diode Having Adjustable Breakdown Voltage
Patent:
5,998,837 →
Application:
08/919,523 →
Trench-Gated Mosfet with Bidirectional Voltage Clamping
Patent:
6,049,108 →
Application:
08/920,330 →
Planar Dmos Transistor Fabricated by a Three Mask Process
Patent:
5,923,979 →
Application:
08/922,672 →
Thick Film Low Value High Frequency Inductor, and Method of Making the Same
Patent:
5,922,514 →
Application:
08/936,193 →
Three-Terminal Power Mosfet Switch for Use as Synchronous Rectifier or Voltage Clamp
Patent:
5,929,690 →
Application:
08/937,941 →
Trench-Gated Mosfet with Integral Temperature Detection Diode
Patent:
6,046,470 →
Application:
08/946,613 →
Short Circuit Protected Dc-Dc Converter Using Disconnect Switching and Method of Protecting Load Against Short Circuits
Patent:
6,031,702 →
Application:
08/956,257 →
Trench-Gated Power Mosfet with Protective Diode
Patent:
6,140,678 →
Application:
08/962,867 →
Method of Making Punch-Through Field Effect Transistor
Patent:
6,069,043 →
Application:
08/962,885 →
High Current, Low Profile Inductor
Patent:
6,204,744 →
Application:
08/963,224 →
High Density Trench Dmos Transistor with Trench Bottom Implant
Patent:
5,929,481 →
Application:
08/964,419 →
Method of Fabricating Vertical Power Mosfet Having Low Distributed Resistance
Patent:
6,043,125 →
Application:
08/966,553 →
Folded Ramp Capacitance Circuit with Current Source and Comparator Circuit
Patent:
5,955,903 →
Application:
08/979,837 →
Electrostatic Discharge Protection Circuit
Patent:
6,060,752 →
Application:
09/002,179 →
Portable Computer Containing Bidirectional Current Blocking Mosfet for Battery Disconnect Switching
Patent:
6,087,740 →
Application:
09/006,774 →
Pseudo-Schottky Diode
Patent:
6,476,442 →
Application:
09/037,557 →
Power Mosfet Including Internal Power Supply Circuitry
Patent:
6,087,862 →
Application:
09/041,368 →
Method for Doping Sintered Tantalum Pellets with Nitrogen
Patent:
6,010,660 →
Application:
09/064,475 →
Vertical Dmos Field Effect Transistor with Conformal Buried Layer for Reduced On-Resistance
Patent:
6,072,216 →
Application:
09/071,729 →
Multi-Tap Thin Film Inductor
Patent:
6,159,817 →
Application:
09/074,185 →
Thick Film Low Value High Frequency Inductor, and Method of Making the Same
Patent:
6,215,387 →
Application:
09/080,494 →
Vertical Trench-Gated Power Mosfet Having Stripe Geometry and High Cell Density
Patent:
6,204,533 →
Application:
09/089,250 →
Ic Chip Package with Directly Connected Leads
Patent:
6,249,041 →
Application:
09/089,310 →
Method for Doping Sintered Tantalum and Niobium Pellets with Nitrogen
Patent:
6,185,090 →
Application:
09/146,685 →
Tantalum Chip Capacitor and Method
Patent:
6,238,444 →
Application:
09/167,690 →
Method of Forming Trench Power Mosfet
Patent:
6,096,608 →
Application:
09/186,216 →
Trench Mosfet Having Improved Breakdown and on-Resistance Characteristics
Patent:
6,084,264 →
Application:
09/200,197 →
Surface Mounted Four Terminal Resistor
Patent:
5,999,085 →
Application:
09/247,490 →
Method of Fabricating Lateral Power Mosfet Having Metal Strap Layer to Reduce Distributed Resistance
Patent:
6,159,841 →
Application:
09/264,602 →
Inductor Coil Structure
Patent:
6,198,375 →
Application:
09/271,748 →
Method of Forming Vertical Planar Dmosfet with Self-Aligned Contact
Patent:
6,277,695 →
Application:
09/293,380 →
Power Mosfet Having Voltage-Clamped Gate
Patent:
6,172,383 →
Application:
09/306,003 →
Chip Scale Surface Mount Packages for Semiconductor Device and Process of Fabricating the Same
Patent:
6,316,287 →
Application:
09/395,094 →
Process of Fabricating a Chip Scale Surface Mount Package for Semiconductor Device
Patent:
6,271,060 →
Application:
09/395,095 →
Rf Modem Utilizing Saw Resonator and Correlator and Communications Transceiver Constructed Therefrom
Patent:
6,535,545 →
Application:
09/419,824 →
High Density Trench-Gated Power Mosfet
Patent:
6,348,712 →
Application:
09/428,299 →
Surface Mount Resistor
Patent:
6,184,775 →
Application:
09/441,434 →
Thick Film Low Value High Frequency Inductor, and Method of Making the Same
Patent:
6,201,215 →
Application:
09/448,676 →
Semiconductor Die Package Including Cup-Shaped Leadframe
Patent:
6,744,124 →
Application:
09/468,249 →
Method for Making Formed Surface Mount Resistor
Patent:
6,510,605 →
Application:
09/471,617 →
Method for Making Overlay Surface Mount Resistor
Patent:
6,401,329 →
Application:
09/471,622 →
Monolithic Heat Sinking Resistor
Patent:
6,181,234 →
Application:
09/474,448 →
Barrier Accumulation Mode Mosfet
Patent:
6,285,060 →
Application:
09/476,320 →
Method of Operation of Punch-Through Field Effect Transistor
Method and Apparatus for Delivering Power Simultaneously to Rechargeable Battery and Electronic Device
Patent:
6,300,744 →
Application:
09/502,546 →
Method for Doping Sintered Tantalum and Niobium Pellets with Nitrogen
Patent:
6,410,083 →
Application:
09/514,221 →
Vertical Structure and Process for Semiconductor Wafer-Level Chip Scale Packages
Patent:
6,392,290 →
Application:
09/545,287 →
Method for Making Inductor Coil Structure
Patent:
6,449,829 →
Application:
09/546,859 →
Method for Making a High Current Low Profile Inductor
Patent:
6,460,244 →
Application:
09/547,155 →
Surface Mounted Four Terminal Resistor
Patent:
39,660 →
Application:
09/568,937 →
Method for Centering Capacitor in Mold
Patent:
6,368,364 →
Application:
09/577,745 →
Precision High-Frequency Capacitor Formed on Semiconductor Substrate
Patent:
6,538,300 →
Application:
09/661,483 →
Rf Modem and Communications Transceiver Utilizing Saw Device and Pulse Shaping
Patent:
6,970,496 →
Application:
09/688,300 →
Overlay Surface Mount Resistor
Patent:
6,441,718 →
Application:
09/715,252 →
Thick Film Low Value High Frequency Inductor, and Method of Making the Same
Patent:
6,391,526 →
Application:
09/722,853 →
Sintered Tantalum and Niobium Capacitor Pellets Doped with Nitrogen, and Method of Making the Same
Chip Scale Surface Mount Package for Semiconductor Device and Process of Fabricating the Same
Method of Forming Termination on Chip Components
Fast Heat Rise Resistor Using Resistive Foil
Side-By-Side Coil Inductor
Method for Thin Film Ntc Thermistor
Power Chip Resistor
Method of Fabricating Trench-Gated Power Mosfet
Precision Resistor Tube Feeder
Method for Making Conductive Polymer Capacitor
Method for Tantalum Pentoxide Moisture Barrier in Film Resistors
Structure of making a thick film low value high frequency inductor
Capacitor Termination Assembly
Chip Scale Surface Mount Package for Semiconductor Device and Process of Fabricating the Same
Process for Manufacturing Trench Gated Mosfet Having Drain/Drift Region
Trench Mis Device with Active Trench Corners and Thick Bottom Oxide and Method of Making the Same
Trench Mis Device with Reduced Gate-to-Drain Capacitance
Surge Current Chip Resistor
Method of Suppressing the Oxidation Characteristics of Nickel
Method for Making Overlay Surface Mount Resistor
Apparatus for Tantalum Pentoxide Moisture Barrier in Film Resistors
Method for Making a Resistor Using Resistive Foil
Method for Manufacturing a Power Chip Resistor
Method of Making Trench-Gated Mosfet Having Cesium Gate Oxide Layer
Structures of and Methods of Fabricating Trench-Gated Mis Devices
Trench Mis Device with Graduated Gate Oxide Layer
Method of Fabricating Trench Mis Device with Graduated Gate Oxide Layer
Method of Fabricating Trench Junction Barrier Rectifier
Chip Scale Surface Mount Package for Semiconductor Device and Process of Fabricating the Same
Thicker Oxide Formation at the Trench Bottom by Selective Oxide Deposition
Self-Aligned Differential Oxidation in Trenches by Ion Implantation
Precision High-Frequency Capacitor Formed on Semiconductor Substrate
Precision High-Frequency Capacitor on Semiconductor Substrate
Trench Mosfet Having Implanted Drain-Drift Region
Flip Chip Resistor and Its Manufacturing Method
Inductor Coil and Method for Making Same
Method for Making Trench Mis Device with Reduced Gate-to-Drain Capacitance
Semiconductor Assembly with Package Using Cup-Shaped Lead Frame
Method of Manufacturing a Resistor
Method for Making Trench Mosfet Having Implanted Drain-Drift Region
Trench Mis Device Having Implanted Drain-Drift Region and Thick Bottom Oxide and Process for Manufacturing the Same
Method of Manufacturing Flip Chip Resistor
High Power Resistor Having an Improved Operating Temperature Range
Trench Mis Device Having Implanted Drain-Drift Region and Thick Bottom Oxide
Triple-Diffused Trench Mosfet and Method of Fabricating the Same
Trench Mis Device with Thick Oxide Layer in Bottom of Gate Contact Trench
Method for Making High Power Resistor Having Improved Operating Temperature Range
Patent:
6,925,704 →
Application:
10/744,846 →
High Precision Power Resistors
Surface Mount Flipchip Capacitor
Patent:
6,914,770 →
Application:
10/792,135 →
Surface Mount Melf Capacitor
Surface Mount Chip Capacitor
Method for Making Overlay Surface Mount Resistor
Termination for Trench Mis Device Having Implanted Drain-Drift Region
Termination for Trench Mis Device Having Implanted Drain-Drift Region
Patent:
6,927,451 →
Application:
10/811,443 →
Super Trench Mosfet Including Buried Source Electrode and Method of Fabricating the Same
Process for Manufacturing Trench Mis Device Having Implanted Drain-Drift Region and Thick Bottom Oxide
Foil Strain Gage for Automated Handling and Packaging
Method for Manufacturing a Fast Heat Rise Resistor
Method of Manufacturing a Resistor
Semiconductor Package Including Die Interposed Between Cup-Shaped Lead Frame and Lead Frame Having Mesas and Valleys
Method of Fabricating Semiconductor Package Including Die Interposed Between Cup-Shaped Lead Frame Having Mesas and Valleys
Method for Making Overlay Surface Mount Resistor
Inductor Coil and Method for Making Same
Method for Interwoven Spreading Codes
Printed Circuit Board with Integral Strain Gage
Surface Mount Electrical Resistor with Thermally Conductive, Electrically Insulative Filler and Method for Using Same
High Power Resistor Having an Improved Operating Temperature Range
Surface Mount Capacitor and Method of Making Same
Process of Fabricating Termination Region for Trench Mis Device
Triple-Diffused Trench Mosfet
Trench Mis Device Having Implanted Drain-Drift Region and Thick Bottom Oxide
Method of Suppressing the Oxidation Characteristics of Nickel
Universal cassette
Application:
11/229,875 →
Publication:
US 2007/0062889
Termination for Trench Mis Device Having Implanted Drain-Drift Region
Surface Mount Melf Capacitor
Surface Mount Melf Capacitor
Surface Mount Chip Capacitor
Method of Maufacturing Surface Mount Capacitor
Surface Mount Chip Capacitor
Method of Fabricating Trench Mis Device with Thick Oxide Layer in Bottom of Trench
High Voltage Capacitors
Flux Channeled, High Current Inductor
Inductor Coil
High Precision Capacitor with Standoff
Inductor with Thermally Stable Resistance
Method for Making a High Current Low Profile Inductor
Super Trench Mosfet Including Buried Source Electrode
Ceramic Dielectric Formulation for Broad Band Uhf Antenna
Method for Making a High Current Low Profile Inductor
Power Resistor
Method for Making a High Current Low Profile Inductor
Resistor, and Method for Making Same
Highly Coupled Inductor
High Powered Inductors Using a Magnetic Bias
Resistor and Method for Making Same
Method for Making a High Current Low Profile Inductor
Metal Strip Resistor for Mitigating Effects of Thermal Emf
Bulk Capacitor and Method
Application:
61/094,317 →
Metal Strip Resistor for Mitigating Effects of Thermal Emf
Application:
61/161,636 →
Metal Strip Resistor for Mitigating Effects of Thermal Emf
Application:
61/169,377 →
Hermetically Sealed Wet Electrolytic Capacitor
Application:
61/169,764 →
Circuit Compensation in Strain Gage Based Transducers
Application:
61/229,123 →
Related Assignments
(6)
Other recorded transfers of the patents in this record — the chain of ownership.
Release of Security Interest
Dec 14, 2010
From: COMERICA BANK, AS AGENT, A TEXAS BANKING ASSOCIATION (FORMERLY A MICHIGAN BANKING CORPORATION)
To: VISHAY SPRAGUE, INC., SUCCESSOR-IN-INTEREST TO VISHAY EFI, INC. AND VISHAY THIN FILM, LLC, A DELAWARE CORPORATION; VISHAY DALE ELECTRONICS, INC., A DELAWARE CORPORATION; VISHAY INTERTECHNOLOGY, INC., A DELAWARE CORPORATION; SILICONIX INCORPORATED, A DELAWARE CORPORATION
Reel/Frame 025489/0184 →
Security Agreement
Jan 21, 2011
From: VISHAY INTERTECHNOLOGY, INC.; VISHAY DALE ELECTRONICS, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 025675/0001 →
Assignment of Assignor's Interest
Feb 15, 2011
From: VISHAY INTERTECHNOLOGY, INC.
To: VISHAY PRECISION GROUP, INC.
Reel/Frame 025809/0682 →
Security Agreement
Feb 1, 2013
From: VISHAY PRECISION GROUP, INC.
To: JPMORGAN CHASE BANK
Reel/Frame 029733/0260 →
Security Interest
Jun 12, 2019
From: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY DALE ELECTRONICS, LLC; VISHAY-DALE, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049440/0876 →
Release of Security Interest
Jul 17, 2019
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED
Reel/Frame 049826/0312 →