IP Library › Granted Patent US 6,859,999
Granted Patent B2
US 6,859,999 · App. 10/091,792 · Granted Mar 1, 2005

Method for manufacturing a power chip resistor

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Quick Facts
Patent No.
US 6,859,999
App. No.
10/091,792
Granted
Mar 1, 2005
Kind
B2
Abstract

The invention provides for a method of manufacturing a stacked power chip resistor. The method includes adhering a first chip resistor to a second chip resistor with a glass encapsulant, connecting a first terminal of the first chip resistor to a first terminal of the second chip resistor with the first metal barrier, and connecting a second terminal on the first chip resistor to a second terminal of the second chip resistor with a second metal barrier.

Claims (8)

1. A method of manufacturing a stacked power chip resistor that increases the amount of heat dissipated without requiring additional board space comprising:

separating a first chip resistor from a second chip resistor with a glass encapsulant, each chip resistor comprising a substrate, a resistive element on the substrate and first and second end caps electrically connected to opposite ends of the resistive elements;

connecting the first end cap of the first resistor and the first end cap of the second resistor with a first barrier to mechanically connect the first and second chip resistors to provide long term mechanical stability in a manner resistant to resistive heating;

connecting the second end cap of the first resistor and the second end cap of the second resistor with a second barrier to mechanically connect the first and second chip resistors to provide long term mechanical stability in a manner resistant to resistive heating.

2. The method of claim 1 wherein each substrate is an alumina substrate.

3. The method of claim 1 wherein each resistive element is a ruthenium oxide resistive element.

4. The method of claim 1 wherein the first chip resistor and the second chip resistor are each of a standard size of approximately 0.250 inches in length.

5. The method of claim 1 wherein the first and second metal barrier comprise nickel plating.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Jul 17, 2019
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.; VISHAY TECHNO COMPONENTS, LLC; VISHAY EFI, INC.; VISHAY VITRAMON, INC.; SPRAGUE ELECTRIC COMPANY
Reel/Frame 049826/0312 →
SECURITY AGREEMENT Recorded Jan 21, 2011
From: VISHAY INTERTECHNOLOGY, INC.; VISHAY DALE ELECTRONICS, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 025675/0001 →
RELEASE OF SECURITY INTEREST Recorded Dec 14, 2010
From: COMERICA BANK, AS AGENT, A TEXAS BANKING ASSOCIATION (FORMERLY A MICHIGAN BANKING CORPORATION)
To: VISHAY SPRAGUE, INC., SUCCESSOR-IN-INTEREST TO VISHAY EFI, INC. AND VISHAY THIN FILM, LLC, A DELAWARE CORPORATION; VISHAY DALE ELECTRONICS, INC., A DELAWARE CORPORATION; VISHAY INTERTECHNOLOGY, INC., A DELAWARE CORPORATION; SILICONIX INCORPORATED, A DELAWARE CORPORATION; VISHAY MEASUREMENTS GROUP, INC., A DELAWARE CORPORATION; VISHAY GENERAL SEMICONDUCTOR, LLC, F/K/A GENERAL SEMICONDUCTOR, INC., A DELAWARE LIMITED LIABILITY COMPANY; VISHAY VITRAMON, INCORPORATED, A DELAWARE CORPORATION; YOSEMITE INVESTMENT, INC., AN INDIANA CORPORATION
Reel/Frame 025489/0184 →
SECURITY AGREEMENT Recorded Mar 2, 2010
From: VISHAY SPRAGUE, INC., SUCCESSOR IN INTEREST TO VISHAY EFI, INC. AND VISHAY THIN FILM, LLC; VISHAY DALE ELECTRONICS, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY MEASUREMENTS GROUP, INC.
To: COMERICA BANK, AS AGENT
Reel/Frame 024006/0515 →
CHANGE OF NAME Recorded Nov 17, 2004
From: VISHAY DALE ELECTRONICS, INC.
To: VISHAY TECHNO COMPONENTS, LLC
Reel/Frame 015369/0511 →