Super trench MOSFET including buried source electrode
View Patent ↗In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.
1. A trench-gate MOSFET comprising:
a semiconductor substrate having first and second trenches formed at a first surface thereof, said first and second trenches forming a mesa therebetween, said mesa comprising:
a source region of a first conductivity type located adjacent said first and second trenches at said first surface;
a body region of a second conductivity type opposite to said first conductivity type adjacent said first and second trenches and forming a junction with said source region; and
a drift region of said first conductivity type located adjacent said first and second trenches and forming a junction with said body region, wherein said drift region has a substantially uniform doping concentration Nconst in a central portion of said drift region;
a drain region of said first conductivity type adjacent a second surface of said substrate opposite to said first surface, said drain region having a doping concentration greater than Nconst; and
a metal layer overlying said first surface of said substrate and being in electrical contact with said source region;
each of said first and second trenches comprising
an upper portion comprising a gate electrode, said gate electrode being separated from said body region by a gate oxide layer; and
a lower portion comprising a buried source electrode, said buried source electrode being electrically isolated from said drift region by a second oxide layer and from said gate electrode by a third oxide layer, said buried source electrode being electrically connected to said source region;
wherein a width of said mesa, a width of said trench, and said doping concentration Nconst in said drift region are established such that said drift region is fully depleted at a drain-to-source voltage equal to Vds but is not fully depleted at a drain-to-source voltage of less than Vds;
wherein a thickness of said second oxide layer in cm is approximately equal to 10 −7 times said voltage Vds in volts; and
wherein Vds equals 200 volts, Nconst equals 7.5×10 16 cm −3 , said mesa width equals 3.1 μm, said trench width equals 3.4 μm, and said thickness of said second oxide layer equals 1.6 μm.
2. A trench-gate MOSFET comprising:
a semiconductor substrate having first and second trenches formed at a first surface thereof, said first and second trenches forming a mesa therebetween, said mesa comprising:
a source region of a first conductivity type located adjacent said first and second trenches at said first surface;
a body region of a second conductivity type opposite to said first conductivity type adjacent said first and second trenches and forming a junction with said source region; and
a drift region of said first conductivity type located adjacent said first and second trenches and forming a junction with said body region, wherein said drift region has a substantially uniform doping concentration Nconst in a central portion of said drift region;
a drain region of said first conductivity type adjacent a second surface of said substrate opposite to said first surface, said drain region having a doping concentration greater than Nconst; and
a metal layer overlying said first surface of said substrate and being in electrical contact with said source region;
each of said first and second trenches comprising
an upper portion comprising a gate electrode, said gate electrode being separated from said body region by a gate oxide layer; and
a lower portion comprising a buried source electrode, said buried source electrode being electrically isolated from said drift region by a second oxide layer and from said gate electrode by a third oxide layer, said buried source electrode being electrically connected to said source region;
wherein a width of said mesa, a width of said trench, and said doping concentration Nconst in said drift region are established such that said drift region is fully depleted at a drain-to-source voltage equal to Vds but is not fully depleted at a drain-to-source voltage of less than Vds;
wherein a thickness of said second oxide layer in cm is approximately equal to 10 −7 times said voltage Vds in volts; and
wherein Vds equals 250 volts, Nconst equals 4.5×10 15 cm −3 , said mesa width equals 4.4 μm, said trench width equals 4.6 μm, and said thickness of said second oxide layer equals 2.2 μm.