IP Library Granted Patent US 6,665,846
Granted Patent Utility
US 6,665,846 · Confirmation No. 3516

METHOD AND CONFIGURATION FOR VERIFYING A LAYOUT OF AN INTEGRATED CIRCUIT AND APPLICATION THEREOF FOR FABRICATING THE INTEGRATED CIRCUIT

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Code Description Pages PDF
2003-10-17 OATH Oath or Declaration filed 3 View
2003-10-17 LET. Miscellaneous Incoming Letter 5 View
2003-10-17 IFEE Issue Fee Payment (PTO-85B) 1 View
2001-07-13 TRNA Transmittal of New Application 1 View
2001-07-13 SPEC Specification 21 View
2001-07-13 CLM Claims 11 View
2001-07-13 ABST Abstract 1 View
2001-07-13 DRW Drawings-only black and white line drawings 6 View
2001-07-13 OATH Oath or Declaration filed 2 View
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Quick Facts
Patent No.
US 6,665,846
App. No.
09/905,855
Filed
2001-07-13
Granted
2003-12-16
Pub. No.
US20020016948A1
Art Unit
2825
PTA
-63 days