IP Library Granted Patent US 6,915,387
Granted Patent B1
US 6,915,387 · App. 09/910,589 · Granted Jul 5, 2005

System and method for handling updates to memory in a distributed shared memory system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,915,387
App. No.
09/910,589
Granted
Jul 5, 2005
Kind
B1
Abstract

A processor ( 100 ) in a distributed shared memory computer system ( 10 ) receives ownership of data and initiates an initial update to memory request. A front side bus processor interface ( 24 ) forwards the initial update to memory request to a memory directory interface unit ( 22 ). The front side processor interface ( 24 ) may receive subsequent update to memory requests for the data from processors co-located on the same local bus. Front side bus processor interface ( 24 ) maintains a most recent subsequent update to memory in a queue ( 102 ). Once the data has been updated in its home memory ( 17 ), the memory directory interface unit ( 22 ) sends a writeback acknowledge to the front side bus processor interface ( 24 ). The most recent subsequent update to memory request in the queue ( 102 ) is then forwarded by the front side bus processor interface ( 24 ) to the memory directory interface unit ( 24 ) for processing.

Claims (42)

1. A method for handling updates to memory in a distributed shared memory system, comprising:

receiving ownership of data at a first processor;

initiating an initial update to memory request for the data from the first processor;

forwarding the initial update to memory request to a memory directory associated with a home memory for the data;

initiating subsequent updates to memory requests for the data;

maintaining a most recent subsequent update to memory request;

receiving an update acknowledgment corresponding to the initial update to memory request indicating that the data has been updated in its home memory;

forwarding the most recent subsequent update to memory request to the memory directory for processing in response to the update acknowledgment.

2. The method of claim 1 , further comprising:

discarding all but the most recent update to memory request.

3. The method of claim 1 , wherein the initial update to memory request is an implicit writeback.

4. The method of claim 1 , wherein the most recent subsequent update to memory is an implicit writeback.

5. The method of claim 4 , further comprising:

initiating new updates to memory requests for the data;

maintaining a most recent new update to memory request;

receiving an update acknowledgment corresponding to the most recent subsequent update to memory request indicating that the data has been updated in its home memory;

forwarding the most recent new update to memory request to the memory directory for processing in response to the update acknowledgment.

6. The method of claim 1 , wherein the most recent subsequent update to memory is a normal writeback.

7. The method of claim 6 , further comprising:

initiating new updates to memory requests for the data;

receiving an update acknowledgment corresponding to the most recent subsequent update to memory request indicating that the data has been updated in its home memory;

forwarding the new updates to memory request to the memory directory in order for processing in response to the update acknowledgment.

8. The method of claim 1 , further comprising:

receiving a read request for the data at the memory directory from a second processor prior to receiving the initial update to memory request;

transferring an intervention request from the memory directory towards the first processor to obtain the data for the second processor;

providing the data to the second processor from the first processor prior to processing the initial update to memory request.

9. The method of claim 8 , further comprising:

providing a speculative copy of the data from the memory directory to the second processor.

10. The method of claim 8 , wherein the second processor obtains ownership of the data.

11. A system for handling updates to memory in a distributed shared memory system, comprising:

a plurality of processors on a local bus, a first one of the plurality of processors operable to obtain ownership of data, the first one of the plurality of processors operable to send an initial update to memory request for the data in response to ownership of the data;

a processor interface operable to forward the initial update to memory request the processor interface operable to receive subsequent update to memory requests for the data from the plurality of processors, the processor interface operable to maintain a most recent subsequent update to memory request for the data;

a memory directory operable to receive the initial update to memory request, the memory directory operable to update the data in its associated home memory, the memory directory operable to generate an acknowledgment upon updating the data, the processor interface operable to forward the most recent subsequent update to memory request for the data to the memory directory for processing in response to the acknowledgment.

12. The system of claim 11 , wherein the processor interface is operable to discard all but the most recent subsequent update to memory request.

13. The system of claim 11 , wherein the initial update to memory request is an implicit writeback.

14. The method of claim 11 , wherein the most recent subsequent update to memory is an implicit writeback.

15. The method of claim 14 , wherein the processor interface is operable to receive new updates to memory requests for the data from the plurality of processors, the processor interface operable to maintain a most recent new update to memory request, the processor interface operable to receive an update acknowledgment corresponding to the most recent subsequent update to memory request indicating that the data has been updated in its home memory, the processor interface operable to forward the most recent new update to memory request to the memory directory for processing in response to the update acknowledgment.

16. The method of claim 11 , wherein the most recent subsequent update to memory is a normal writeback.

17. The method of claim 16 , wherein the processor interface is operable to receive new updates to memory requests for the data from the plurality of processors, the processor interface operable to receive an update acknowledgment corresponding to the most recent subsequent update to memory request indicating that the data has been updated in its home memory, the processor interface operable to forward the new updates to memory request to the memory directory in order for processing in response to the update acknowledgment.

18. The method of claim 11 , wherein the memory directory is operable to receive a read request for the data from a remote processor prior to receiving the initial update to memory request, the memory directory operable to transfer an intervention request from the memory directory to the processor interface to obtain the data for the remote processor, the processor interface operable to provide the data to the remote processor prior to processing the initial update to memory request.

19. The method of claim 18 , wherein the memory directory is operable to provide a speculative copy of the data to the remote processor.

20. The method of claim 18 , wherein the remote processor obtains ownership of the data.

Assignments (11)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2017
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 044128/0149 →
RELEASE OF SECURITY INTEREST Recorded Nov 2, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 040545/0362 →
SECURITY INTEREST Recorded Mar 13, 2015
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035200/0722 →
MERGER Recorded Apr 18, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032714/0427 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032714/0032 →
CHANGE OF NAME Recorded Apr 18, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032714/0230 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2012
From: SILICON GRAPHICS, INC. ET AL.; SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL, CORP.
Reel/Frame 027727/0086 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2007
From: GENERAL ELECTRIC CAPITAL CORPORATION
To: MORGAN STANLEY & CO., INCORPORATED
Reel/Frame 019995/0895 →
SECURITY INTEREST Recorded Oct 24, 2006
From: SILICON GRAPHICS, INC.
To: GENERAL ELECTRIC CAPITAL CORPORATION
Reel/Frame 018545/0777 →
SECURITY AGREEMENT Recorded Aug 19, 2005
From: SILICON GRAPHICS, INC. AND SILICON GRAPHICS FEDERAL, INC. (EACH A DELAWARE CORPORATION)
To: WELLS FARGO FOOTHILL CAPITAL, INC.
Reel/Frame 016871/0809 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2001
From: HUFFMAN, WILLIAM A.; KUSKIN, JEFFREY S.
To: SILICON GRAPHICS, INC.
Reel/Frame 012528/0713 →