IP Library › Assignment 044128/0149
Patent Assignment
Reel/Frame 044128/0149

Assignment of Assignor's Interest

Recorded: 2017-10-04 Pages: 76
Assignor
Assignee
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
11445 COMPAQ CENTER DRIVE WEST, HOUSTON, TEXAS, 77070
Covered Properties (671)
Computer Rack with Power Distribution System
System and Method of Synchronizing Real Time Clock Values in Arbitrary Distributed Systems
On-Blade Cold Sink for High-Density Clustered Computer System
Twin Server Blades for High-Density Clustered Computer System
Independent Removable Computer Rack Power Distribution System for High-Density Clustered Computer System
Closed-Loop Cooling System for High-Density Clustered Computer System
Active Archive Bridge
Elastic Hierarchical Data Storage Backend
Localized Fast Bulk Storage in a Multi-Node Computer System
Populating Localized Fast Bulk Storage in a Multi-Node Computer System
Replicated Database Using One Sided Rdma
Software Design Pattern for Adapting a Graph Database Visualization Software
Linearized Dynamic Storage Pool
I/O Acceleration in Hybrid Storage
Hot Swappable Computer Cooling System
Server Embedded Storage Device
Visually Approximating Parallel Coordinates Data
High Speed Serial Link in-Band Lane Fail Over for Ras and Power Management
Low Latency Serial Data Encoding Scheme for Enhanced Burst Error Immunity and Long Term Reliability
Managing Power in a High Performance Cpmputing System for Resiliency and Cooling
Scalable Software Stack
Storage Error Type Determination
Floating Liquid Cooled Heat Transfer Solution
Configurable Node Expansion Space
Node Blind Mate Liquid Cooling
Unified Power Device Management and Analyzer
Method and System for Shared Direct Access Storage
System for Multiprocessor Communication
Patent: 5,526,487 →
Application: 07/308,401 →
Cluster Architecture for a Highly Parallel Scalar/Vector Mulriprocessor System
Patent: 5,197,130 →
Application: 07/459,083 →
Global Registers for a Multiprocessor System
Patent: 5,165,038 →
Application: 07/536,198 →
System and Method for Controlling a Highly Parallel Multiprocessor Using an Anarchy Based Scheduler for Parallel Execution Thread Scheduling
Patent: 5,179,702 →
Application: 07/537,466 →
Vector Bit and Word Shift Functional Unit for Supercomputer Processor
Application: 07/618,748 →
Method and Apparatus for Memory Access in a Matrix Processor Computer
Patent: 6,282,583 →
Application: 07/710,146 →
Fiber Optic Channel Extender Interface Method and Apparatus
Patent: 5,390,041 →
Application: 07/788,496 →
Method and Apparatus for a Unified Parallel Processing Architecture
Patent: 5,428,803 →
Application: 07/912,964 →
Method for Clocking Functional Units in One Cycle by Using a Single Clock for Routing Clock Inputs to Initiate Receive Operations Prior to Transmit Operations
Patent: 5,495,596 →
Application: 07/923,086 →
Global Registers for a Multiprocessor System
Application: 07/976,899 →
Direction Order Priority Routing of Packets Between Nodes in a Networked System
Patent: 5,533,198 →
Application: 07/983,979 →
Method and Apparatus for User Side Scheduling in a Multiprocessor Operating System Program That Implements Distributive Scheduling of Processes
Patent: 6,195,676 →
Application: 08/003,000 →
Retaining and Release Mechanism for Computer Storage Devices Including a Pawl Latch Assembly
Patent: 5,269,698 →
Application: 08/009,576 →
Optical Clock Distribution System
Patent: 5,537,498 →
Application: 08/027,049 →
High Memory Capacity Dram Simm
Patent: 5,272,664 →
Application: 08/049,803 →
A System and Method of Implementing Read Resources to Maintain Cache Coherency in a Multiprocessor Environment Permitting Split Transactions
Patent: 5,504,874 →
Application: 08/128,080 →
System and Method for Piggybacking of Read Responses on a Shared Memory Multiprocessor Bus
Patent: 5,655,102 →
Application: 08/128,081 →
A System and Method for Fair Arbitration on a Multi-Domain Multiprocessor Bus
Patent: 5,509,125 →
Application: 08/128,082 →
System and Method for Generating a Read-Modify-Write Operation
Patent: 5,544,331 →
Application: 08/128,720 →
Method and Apparatus for Locking Shared Memory Locations in Multiprocessing Systems
Patent: 5,535,365 →
Application: 08/141,259 →
System and Method of Addressing Distributed Memory Within a Massively Parallel Processing System
Patent: 5,765,181 →
Application: 08/165,118 →
Barrier Synchronization for Distributed Memory Massively Parallel Processing Systems
Patent: 5,434,995 →
Application: 08/165,265 →
System for Allocating Messages Between Virtual Channels to Avoid Deadlock and to Optimize the Amount of Message Traffic on Each Type of Virtual Channel
Patent: 5,583,990 →
Application: 08/165,266 →
Method for the Dynamic Allocation of Array Sizes in a Multiprocessor System
Patent: 5,586,325 →
Application: 08/165,379 →
Recursive Address Centrifuge for Distributed Memory Massively Parallel Processing Systems
Patent: 5,696,922 →
Application: 08/165,388 →
Repetitive Signal Detector for Preventing Thermal Runaway
Patent: 5,418,481 →
Application: 08/165,747 →
Virtual to Logical to Physical Address Translation for Distributed Memory Massively Parallel Processing Systems
Patent: 5,784,706 →
Application: 08/165,814 →
Method of Managing Distributed Memory Within a Massively Parallel Processing System
Patent: 5,566,321 →
Application: 08/166,293 →
Messaging Facility with Hardware Tail Pointer and Software Implemented Head Pointer Message Queue for Distributed Memory Massively Parallel Processing System
Patent: 5,581,705 →
Application: 08/166,443 →
Method for the Dynamic Allocation of Page Sizes in Virtual Memory
Patent: 5,802,341 →
Application: 08/166,451 →
Disk Drive Bracket
Patent: 5,564,804 →
Application: 08/168,166 →
Arrangement for Modifying Electrical Printed Circuit Boards
Patent: 5,834,705 →
Application: 08/205,990 →
Vector Shift Functional Unit for Successively Shifting Operands Stored in a Vector Register by Corresponding Shift Counts Stored in Another Vector Register
Patent: 5,481,746 →
Application: 08/218,997 →
Fiber Optic Channel Extender Interface Method and Apparatus
Patent: 5,420,583 →
Application: 08/250,375 →
Interleaved Memory Access System Having Variable-Sized Segments Logical Address Spaces and Means for Dividing/Mapping Physical Address into Higher and Lower Order Addresses
Patent: 5,561,784 →
Application: 08/268,660 →
Extendible Clock Mechanism
Patent: 5,625,831 →
Application: 08/331,730 →
Stream Buffers for High-Performance Computer Memory Systems
Patent: 5,761,706 →
Application: 08/333,133 →
Apparatus and Method for Testing Using Clocked Test Access Port Controller for Level Sensitive Scan Designs
Patent: 6,173,428 →
Application: 08/340,238 →
Associative Scalar Data Cache with Write-Through Capabilities for a Vector Processor
Patent: 5,717,895 →
Application: 08/348,056 →
Method and Apparatus for Accessing Global Registers in a Multiprocessor System
Patent: 5,524,255 →
Application: 08/379,123 →
Boundary Scan Testing Using Clocked Signal
Patent: 5,487,074 →
Application: 08/406,571 →
Communication Protocol for Transferring Information Across a #S Serial Communication Link
Patent: 5,592,487 →
Application: 08/407,808 →
Adaptive Routing Mechanism for Torus Interconnection Network
Patent: 5,701,416 →
Application: 08/421,566 →
System for Randomly Modifying Virtual Channel Allocation and Accepting the Random Modification Based on the Cost Function
Patent: 5,659,796 →
Application: 08/422,072 →
System for Continuously Recirculating Negatively Acknowledged Requests of the Source Until the Negatively Acknowledged Requests Are Accepted by Flow Control Associated with Each Target
Application: 08/435,448 →
Hierarchical Fat Hypercube Architecture for Parallel Processing Systems
Patent: 5,669,008 →
Application: 08/435,451 →
Programmable, Distributed Network Routing
Patent: 5,721,819 →
Application: 08/435,452 →
A System and Method for the Synchronous Transmission of Data in a Communication Network Utilizing a Source Clock Signal to Latch Serial Data into First Registers and a Handshake Signal to Latch Parallel Data into Second Registers
Patent: 5,768,529 →
Application: 08/435,453 →
Distributed Global Clock System
Patent: 5,822,381 →
Application: 08/435,455 →
System and Method for Maintaining Coherency of Virtual-to-Physical Memory Tranlations in a Multiprocessor Computer
Patent: 5,787,476 →
Application: 08/435,459 →
Directory-Based Coherence Protocol Allowing Efficient Dropping of Clean-Exclusive Data
Patent: 5,680,576 →
Application: 08/435,460 →
System and Method for Multiprocessor Partitioning to Support High Availability
Patent: 5,991,895 →
Application: 08/435,462 →
Cache Coherency Using Flexible Directory Bit Vectors
Patent: 5,634,110 →
Application: 08/435,463 →
Apparatus and Method for Page Migration in a Non-Uniform Memory Access (Numa) System
Application: 08/435,464 →
High Memory Capacity Dimm with Data and State Memory
Application: 08/440,214 →
Dimm Pair with Data Memory and State Memory
Application: 08/440,967 →
Barrier and Eureka Synchronization Architecture for Multiprocessors
Patent: 5,721,921 →
Application: 08/450,251 →
Heatsink and Method of Forming a Heatsink
Patent: 5,829,512 →
Application: 08/520,408 →
Vector Word Shift by Vo Shift Count in Vector Supercomputer Processor
Patent: 5,848,286 →
Application: 08/521,566 →
System and Merthod for Uncached Store Buffering in a Microprocessor
Patent: 5,963,981 →
Application: 08/539,524 →
Configuring of Networked System to Permit Replacement of Failed Nodes and Selection of Alternate Paths
Patent: 5,689,646 →
Application: 08/541,803 →
Acknowledge Triggered Forwarding of External Block Data Responses in a Microprocessor
Patent: 5,832,306 →
Application: 08/544,537 →
Virtual Maintenance Network in Multiprocessing System Having a Non- Flow Controlled Virtual Maintenance Channel
Patent: 6,055,618 →
Application: 08/550,992 →
Nigh Performance Sinusoidal Heat Sink for Heat Removal from Electronic Equipment
Patent: 5,709,263 →
Application: 08/551,070 →
Method and Apparatus for Segmenting a Database
Patent: 5,727,197 →
Application: 08/551,493 →
High Performance Spiral Heat Sink
Patent: 5,661,638 →
Application: 08/552,801 →
Readily Removable Heat Sink Assembly
Patent: 5,662,163 →
Application: 08/564,404 →
Scan Chain for Shiting the State of a Processor into Memory at a Specified Point During System Operation for Testing Purposes
Patent: 5,671,235 →
Application: 08/567,082 →
Message-Passing Multiprocessor System
Patent: 5,790,530 →
Application: 08/573,494 →
A System and Method of Implementing Read Resources to Maintain Cache Coherency in a Multiprocessor Environment Permitting Split Transactions
Patent: 5,664,151 →
Application: 08/578,997 →
Processor-Inclusive Memory Module
Patent: 5,710,733 →
Application: 08/589,532 →
System and Method to Reduce Phase Offset and Phase Jitter in Phase-Locked and Delay-Locked Loops Using Self-Biased Circuits
Patent: 5,727,037 →
Application: 08/592,736 →
Single Connector Attachment Drive Sled Assembly Having Light Pipe Coupled to a Rail
Patent: 5,654,873 →
Application: 08/592,890 →
Transparent Relocation of Real Memory Addresses in the Main Memory of a Data Processor
Patent: 5,765,198 →
Application: 08/595,528 →
Daughter Card Assembly
Patent: 5,761,043 →
Application: 08/604,839 →
Air or Liquid Cooled Computer Module Cold Plate
Patent: 6,305,463 →
Application: 08/604,841 →
Cooling Cap Method and Apparatus for Tab Packaged Integrated Circuits
Patent: 5,805,418 →
Application: 08/604,918 →
Cooling Approach for High Power Integrated Circuits Mounted on Printed Circuit Boards
Patent: 5,768,104 →
Application: 08/605,355 →
Bga Land Pattern
Patent: 6,091,155 →
Application: 08/606,291 →
System and Method to Reduce Jitter in Digital Delay-Locked Loops
Patent: 5,790,612 →
Application: 08/609,068 →
Procedure and System for Placement Optimization of Cells Within Circuit Blocks by Optimizing Placement of Input/Output Ports Within an Integrated Circuit Design
Patent: 5,757,658 →
Application: 08/611,785 →
Massively Parallel Processing System Using Two Data Paths: One Connecting Router Circuit to the Interconnect Network and the Other Connecting Router Circuit to I/O Controller
Patent: 5,864,738 →
Application: 08/614,859 →
System and Method for Fault-Tolerant Transmission of Data Within a Dual Ring Network
Patent: 6,233,704 →
Application: 08/614,860 →
Messaging in Distributed Memory Multiprocessing System Having Shell Circuitry for Atomic Control of Message Storage Queue's Tail Pointer Structure in Local Memory
Patent: 5,841,973 →
Application: 08/615,694 →
Adaptive Congestion Control Mechanism for Modular Computer Networks
Patent: 5,748,900 →
Application: 08/615,700 →
Multi-Configurable Push-Pull/Open-Drain Driver Circuit
Patent: 5,811,997 →
Application: 08/638,186 →
Heat Sink with Integral Attachment Mechanism
Patent: 5,735,340 →
Application: 08/649,769 →
Raid-5 Parity Generation and Data Reconstruction
Patent: 5,805,788 →
Application: 08/650,336 →
Method and Apparatus for Adjusting the Power Supply Voltage Provided to a Microprocessor
Patent: 5,694,028 →
Application: 08/650,337 →
A System for Arbitrating Packetized Data from the Network to the Peripheral Resources and Prioritizing the Dispatching of Packets Onto the Network
Patent: 5,761,534 →
Application: 08/650,630 →
A Raid System Using I/O Buffer Segment to Temporary Store Striped and Parity Data and Connecting All Disk Drives via a Single Time Multiplexed Network
Patent: 5,862,313 →
Application: 08/650,632 →
Networked Multiprocessor System with Global Distributed Memory and Block Transfer Engine
Patent: 5,797,035 →
Application: 08/661,908 →
Multiprocessor Computer System with Interleaved Processing Element Nodes
Patent: 5,737,628 →
Application: 08/662,868 →
Method and Apparatus for Removing Power-of-Two Restrictions on Distributed Addressing
Patent: 5,900,023 →
Application: 08/673,436 →
Array Address and Loop Alignment Calculations
Application: 08/675,771 →
Apparatus and Method for Determining the Speed of a Semiconductor Chip
Patent: 5,818,250 →
Application: 08/675,849 →
Apparatus and Method for Dynamic Central Processing Unit Clock Adjustment
Patent: 5,774,704 →
Application: 08/688,501 →
Bulkhead Gasket Assembly
Patent: 5,770,822 →
Application: 08/697,073 →
Density Dependent Vector Mask Operation Control Apparatus and Method
Patent: 5,940,625 →
Application: 08/706,808 →
Method to Pipeline Write Misses in Shared Cache Multiprocessor Systems
Patent: 5,875,468 →
Application: 08/708,298 →
Compression Connector
Patent: 5,730,605 →
Application: 08/713,283 →
Direct Memory Access Apparatus for Transferring a Block of Data Having Discontinuous Addresses Using an Address Calculating Circuit
Patent: 6,108,722 →
Application: 08/713,602 →
Resilient Panel for Housing a Machine
Patent: 5,897,180 →
Application: 08/716,928 →
An Upstream Situated Apparatus and Method Within a Computer System for Controlling Data Flow to a Downstream Situated Input/Output Unit
Patent: 6,154,794 →
Application: 08/716,951 →
Instruction Methods for Performing Data Formatting While Moving Data Between Memory and a Vector Register File
Patent: 5,812,147 →
Application: 08/716,972 →
Packet Switched Router Architecture for Providing Multiple Simultaneous Communications
Patent: 6,683,876 →
Application: 08/717,580 →
Guaranteed Bandwidth Allocation Method in a Computer System for Input/Output Data Transfers
Patent: 5,784,569 →
Application: 08/717,581 →
Cable Management System for a Computer
Patent: 5,957,556 →
Application: 08/717,988 →
Raid System with Fibre Channel Arbitrated Loop
Patent: 5,812,754 →
Application: 08/718,743 →
Adaptive Frequency Synthesizer with Synchronization
Patent: 6,067,411 →
Application: 08/718,765 →
High Memory Capacity Dimm with Data and State Memory
Patent: 5,790,447 →
Application: 08/747,975 →
Dimm Pair with Data Memory and State Memory
Patent: 5,686,730 →
Application: 08/747,976 →
Low-Latency Real-Time Dispatching in General Purpose Multiprocessor Systems
Patent: 5,928,322 →
Application: 08/752,925 →
Apparatus and Method for Page Migration in a Non-Uniform Memory Access (Numa) System
Patent: 5,727,150 →
Application: 08/766,363 →
Guaranteeing Completion Times for Batch Jobs Without Static Partitioning
Patent: 6,353,844 →
Application: 08/773,486 →
Programmable Packer and Unpacker with Ditherer
Patent: 6,065,084 →
Application: 08/775,834 →
High Bandwidth Pci to Packet Switched Router Bridge Having Minimized Memory Latency
Patent: 5,915,104 →
Application: 08/780,781 →
Packetized Data Transmissions in a Switched Router Architecture
Patent: 6,282,195 →
Application: 08/780,785 →
Circuit for Filtering a Power Supply for Noise Sensitive Devices
Patent: 5,825,238 →
Application: 08/788,369 →
Processor-Inclusive Memory Module
Patent: 5,999,437 →
Application: 08/789,557 →
Power Switch Plunger Mechanism
Patent: 5,817,997 →
Application: 08/794,195 →
Method and System for Simultaneous High Bandwidth Input Output
Patent: 5,991,824 →
Application: 08/796,129 →
Loading and Placement Device for Connecting Circuit Boards
Patent: 5,848,906 →
Application: 08/796,302 →
Distributed Scheduling of Parallel Jobs with No Kernel-to-Kernel Communication
Patent: 6,766,515 →
Application: 08/801,646 →
System and Method for Finding Preempted Threads in a Multi-Threaded Application
Patent: 6,418,460 →
Application: 08/802,802 →
System for Communications Where First Priority Data Transfer Is Not Disturbed by Second Priority Data Transfer and Where Allocated Bandwidth Is Removed When Process Terminates Abnormally
Patent: 5,909,594 →
Application: 08/805,991 →
System and Method for Scheduling an Event Subject to the Availability of Requested Participants
Patent: 5,963,913 →
Application: 08/807,551 →
Rotary Latch Assembly for a Computer Housing
Patent: 5,826,922 →
Application: 08/815,636 →
Network Request Distribution Based on Static Rules and Dynamic Performance Data
Patent: 6,173,322 →
Application: 08/866,247 →
Recursive Address Centrifuge for Distributed Memory Massively Parallel Processing Systems
Patent: 6,119,198 →
Application: 08/889,251 →
System and Method for Input/Output Flow Control in a Multiprocessor Computer System
Patent: 5,974,456 →
Application: 08/892,879 →
Processor-Inclusive Memory Module
Patent: 5,867,419 →
Application: 08/903,042 →
Method, System and Computer Program Product for Profiling Thread Virtual Memory Accesses
Patent: 5,974,536 →
Application: 08/911,192 →
Integral Actuator for a Printed Circuit Board
Patent: 5,967,825 →
Application: 08/911,909 →
Precise Detection of Errors Using Hardware Watchpoint Mechanism
Patent: 5,987,626 →
Application: 08/920,177 →
System Method and Computer Program Product for Organizing Page Caches
Patent: 6,115,790 →
Application: 08/921,257 →
Method, System, and Computer Program Product for Page Replication in a Non-Uniform Memory Access System
Patent: 6,167,437 →
Application: 08/921,545 →
Stop Align Lateral Module to Module Interconnect
Patent: 6,116,915 →
Application: 08/927,359 →
Adaptive Bandwidth Sharing
Patent: 6,205,119 →
Application: 08/931,565 →
Method, System, and Computer Program Product for Allocating Physical Memory in a Distributed Shared Memory Network
Patent: 6,249,802 →
Application: 08/933,829 →
Method, System and Computer Program Product for Managing Memory in a Non-Uniform Memory Access System
Patent: 6,289,424 →
Application: 08/933,833 →
Reverse Mapping Page Frame Data Structures to Page Table Entries.
Patent: 6,112,286 →
Application: 08/933,998 →
System, Method and Computer Program Product for Inter-Cell Page Sharing in a Distributed Shared Memory System
Patent: 6,148,379 →
Application: 08/933,999 →
Demateable, Compliant, Area Array Interconnect
Patent: 6,142,789 →
Application: 08/934,973 →
Adaptive Congestion Control Mechanism for Modular Computer Networks
Patent: 5,958,017 →
Application: 08/935,667 →
Method, System and Computer Program Product for Virtual Memory Support for Managing Translation Look Aside Buffers with Multiple Page Size Support
Patent: 6,112,285 →
Application: 08/935,819 →
Method, System and Computer Program Product for Dynamically Allocating Large Memory Pages of Different Sizes
Patent: 6,182,089 →
Application: 08/935,820 →
System Method and Computer Program Product for Dynamically Sizing Hash Tables
Patent: 5,960,434 →
Application: 08/938,672 →
Sliding Door Assembly for a Computer Housing
Patent: 5,924,780 →
Application: 08/940,273 →
Latching Assembly for a Computer
Patent: 5,907,962 →
Application: 08/966,611 →
Porous Metal Heat Sink
Patent: 6,018,459 →
Application: 08/971,179 →
Multiprocessor Computer System and Method for Maintaining Cache Coherence Utilizing a Multi-Demensional Cache Coherence Directory Structure
Patent: 6,633,958 →
Application: 08/971,184 →
Spacial Derivative Bus Encoder and Decoder
Patent: 6,480,548 →
Application: 08/971,185 →
Data Processing Synchronization with Automatic Queuing
Patent: 6,055,579 →
Application: 08/971,261 →
Router Table Lookup Mechanism
Patent: 5,970,232 →
Application: 08/971,587 →
Hybrid Hypercube/Torus Architecture
Patent: 6,230,252 →
Application: 08/971,588 →
Virtual Channel Assignment in Large Torus Systems
Patent: 6,101,181 →
Application: 08/971,591 →
Serialized Race-Free Virtual Barrier Network
Patent: 6,085,303 →
Application: 08/972,010 →
Improved Hot- Plug Power Supply for High- Availability Computer Systems
Patent: 6,044,424 →
Application: 08/985,562 →
Interleaving Memory in Distributed Vector Architecture Multiprocessor System
Patent: 5,913,069 →
Application: 08/987,948 →
Distributed Vector Architecture
Patent: 5,946,496 →
Application: 08/988,524 →
Message Buffering for a Computer-Based Network
Patent: 6,256,677 →
Application: 08/991,233 →
System and Method for the Direct Rendering of Curve Bounded Objects
Patent: 6,292,192 →
Application: 09/005,129 →
Modular Card Cage
Patent: 6,171,120 →
Application: 09/005,219 →
Method of Handling Arbitrary Size Message Queues in Which a Message Is Written into an Aligned Block of External Registers Within a Plurality of External Registers
Patent: 6,029,212 →
Application: 09/006,449 →
The Fabrication of Test Logic for Level Sensitive Scan on a Circuit
Patent: 6,092,226 →
Application: 09/021,651 →
Method and Apparatus for Segmenting a Database
Patent: 6,049,804 →
Application: 09/036,671 →
Diamond-Based Transformers and Power Convertors
Patent: 6,181,231 →
Application: 09/055,554 →
System and for Stacking of Integrated Circuit Packages
Patent: 6,172,874 →
Application: 09/055,677 →
Large Area, Multi-Device Heat Pipe for Stacked Mcm-Based Systems
Patent: 6,055,157 →
Application: 09/056,037 →
Quantum Acceleration of Conventional Non-Quantum Computers
Patent: 6,081,882 →
Application: 09/057,701 →
Memory System with Multiple Addressing and Control Busses
Patent: 5,870,325 →
Application: 09/060,451 →
Method and System for Efficient Context Switching in a Computer Graphics System
Patent: 6,208,361 →
Application: 09/097,601 →
Method and Apparatus for Processing a Set of Data Values with Plural Processing Units Using Mask Bits Generated by Other Processing Units
Patent: 6,308,250 →
Application: 09/103,201 →
Eigen-Mode Encoding of Signals in a Data Group
Patent: 6,226,330 →
Application: 09/118,158 →
High Memory Capacity Dimm with Data and State Memory
Patent: 6,049,476 →
Application: 09/126,944 →
Crossbar Switch with Communication Ring Bus
Patent: 6,728,206 →
Application: 09/128,392 →
Cooling Cap Method and Apparatus for Tab Packaged Integrated Circuit
Patent: 5,963,428 →
Application: 09/136,908 →
Media Coprocessor with Graphics Video and Audio Tasks Partitioned by Time Division Multiplexing
Patent: 6,275,239 →
Application: 09/137,017 →
Vector Shift Functional Unit for Successively Shifting Operands Stored in a Vector Register by Corresponding Shift Counts Stored in Another Vector Register
Patent: 6,098,162 →
Application: 09/138,613 →
System and Method for Fast Barrier Synchronization
Patent: 6,216,174 →
Application: 09/162,673 →
Array Address and Loop Alignment Calculations
Patent: 6,128,639 →
Application: 09/174,862 →
Advanced Firmware Boot Sequence X86 Computer System That Maintains Legacy Hardware and Software Compatibility
Patent: 6,357,003 →
Application: 09/176,694 →
Advanced Boot Sequence for an X86 Computer System That Maintains Expansion Card Device Compatibility
Patent: 6,128,731 →
Application: 09/176,696 →
Memory System with Multiple Addressing and Control Busses
Patent: 6,078,515 →
Application: 09/196,624 →
High Performance Gas Cooling System and Method
Patent: 6,167,947 →
Application: 09/215,531 →
Memory System with Switching for Data Isolation
Patent: 6,115,278 →
Application: 09/247,256 →
Method and Device for Associating a Pixel with One of a Plurality of Regions in a Logarithm or Cosine Space
Patent: 6,317,126 →
Application: 09/265,487 →
Method and Device for Controlling Access to Memory
Patent: 6,393,533 →
Application: 09/270,613 →
Method for Managing Concurrent Access to Virtual Memory Data Structures
Patent: 6,496,909 →
Application: 09/287,592 →
Method for Efficient Translation of Memory Addresses in Computer Systems
Patent: 6,223,270 →
Application: 09/294,830 →
Noise Estimation for Coupled Rc Interconnects in Deep Submicron Integrated Circuits
Patent: 6,732,065 →
Application: 09/301,863 →
System and Method for Providing Access to a Bus
Patent: 7,197,589 →
Application: 09/315,806 →
Memory System Including Guides That Receive Memory Modules
Patent: 6,629,855 →
Application: 09/346,638 →
Design for Circuit Board Orthogonal Installation and Removal
Patent: 6,256,196 →
Application: 09/346,659 →
Method and Apparatus for Broadcasting Invalidation Messages in a Computer System
Patent: 6,421,712 →
Application: 09/356,106 →
Door Assembly for a Computer
Patent: 6,132,019 →
Application: 09/372,660 →
Memory System with Switching for Data Isolation
Patent: 6,215,686 →
Application: 09/384,471 →
Circuit Design for High-Speed Digital Communication
Patent: 6,775,339 →
Application: 09/384,906 →
Determining a Worst Case Switching Factor for Integrated Circuit Design
Patent: 6,353,917 →
Application: 09/387,934 →
Optimizing Repeaters Positioning Along Interconnects
Patent: 6,389,581 →
Application: 09/388,938 →
Electrically Conductive Path Through a Dielectric Material
Patent: 6,541,853 →
Application: 09/391,133 →
Publication: US 2003/0062616
Input/Output Device Managed Timer Process
Patent: 6,594,787 →
Application: 09/399,437 →
Transfer Attribute Encoding Within Pci Constructed Address to Indicate Whether Bytes Within a Word Should Be Swapped
Patent: 6,711,636 →
Application: 09/407,421 →
Multiprocessor Node Controller Circuit and Method
Patent: 6,751,698 →
Application: 09/407,428 →
Translation of Pci Level Interrupts into Packet Based Messages for Edge Event Drive Microprocessors
Patent: 6,604,161 →
Application: 09/408,084 →
Computer Module Mounting System and Method
Patent: 6,452,805 →
Application: 09/408,148 →
Method and Assembly for Installation or Removal of Printed Circuit Card
Patent: 6,496,385 →
Application: 09/408,657 →
Modular Air Moving System and Method.
Patent: 6,406,257 →
Application: 09/408,769 →
System and Method for Cooling Electronicomponents
Patent: 6,366,461 →
Application: 09/408,772 →
Age-Based Network Arbitration System and Method
Patent: 6,674,720 →
Application: 09/408,778 →
Modular Computing Architecture Having Common Communication Interface
Patent: 6,829,666 →
Application: 09/408,874 →
Printed Circuit Board Carrier Insertion/Extraction Assembly
Patent: 6,193,532 →
Application: 09/408,969 →
Scalable Hypercube Multiprocessor Network for Massive Parallel Processing
Patent: 6,973,559 →
Application: 09/408,972 →
Modular Input/Output Controller Capable of Routing Packets Over Busses Operating at Different Speeds
Patent: 6,553,446 →
Application: 09/409,299 →
Diagnostic System and Method for a Highly Scalable Computing System
Patent: 6,601,183 →
Application: 09/409,438 →
System and Method for Distributing Output Queue Space
Patent: 6,532,501 →
Application: 09/409,605 →
System and Method for Memory Page Migration in a Multi-Processor Computer
Patent: 6,453,408 →
Application: 09/409,606 →
System and Method for Minimizing Error Correction Code Bits in Variable Sized Data Formats
Patent: 6,487,685 →
Application: 09/409,607 →
Method and Apparatus for Decoupling Processor Speed from Memory Subsystem Speed in a Node Controller
Patent: 6,546,451 →
Application: 09/409,639 →
Method and Apparatus for Processing Errors in a Computer System
Patent: 6,457,146 →
Application: 09/409,764 →
Method and Apparatus for Analyzing Buffer Allocation to a Device on a Peripheral Component Interconnect Bus
Patent: 6,397,274 →
Application: 09/409,765 →
Method and System for Handling Interrupts in a Node Controller Without Attached Processors
Patent: 6,564,277 →
Application: 09/409,766 →
Data Synchronizer for a Multiple Rate Clock Source and Method Thereof
Patent: 6,529,570 →
Application: 09/409,768 →
Upstream Situated Apparatus and Method for Providing High Bandwidth Data Flow Control to an Input/Output Unit
Patent: 6,622,182 →
Application: 09/409,805 →
System and Method for Shared Memory Protection in a Multiprocessor Computer
Patent: 6,381,681 →
Application: 09/410,120 →
Configurable Synchronizer for Double Data Rate Synchronous Dynamic Random Access Memory
Patent: 6,279,073 →
Application: 09/410,137 →
Method and Apparatus for Handling Invalidation Requests to Processors Not Present in a Computer System
Patent: 6,339,812 →
Application: 09/410,139 →
Method, System and Computer Program Product for Managing Memory in a Non-Uniform Memory Access System
Patent: 6,336,177 →
Application: 09/417,348 →
Multi-Processor System and Method of Accessing Data Therein
Patent: 6,651,157 →
Application: 09/418,520 →
System and Method to Provide Power to a Sea of Gates Standard Cell Block from an Overhead Bump Grid
Patent: 6,281,108 →
Application: 09/418,597 →
Abstract Verification Environment
Patent: 6,856,950 →
Application: 09/418,706 →
System and Method for a Hierarchical System Management Software Architecture of a Highly Scalable Computing System
Application: 09/422,745 →
System and Method for Hierarchical System Management Software Architecture of a Highly Scalable Computing System
Application: 09/425,122 →
Exchanging Messages Between Computer Systems Communicatively Coupled in a Computer System Network
Patent: 6,766,358 →
Application: 09/427,203 →
Synchronization of Hardware Simulation Processes
Patent: 6,879,948 →
Application: 09/459,995 →
Programmable Differential Delay Circuit with Fine Delay Adjustment
Patent: 6,417,713 →
Application: 09/475,466 →
Carrier for Computer Peripheral Device
Patent: 6,381,139 →
Application: 09/475,469 →
System and Method for Adaptively Deskewing Parallel Data Signals Relative to a Clock
Patent: 7,031,420 →
Application: 09/476,678 →
Cable Dock Fixture with Emi Shielding
Patent: 6,280,257 →
Application: 09/478,968 →
High Density Computer Equipment Storage System
Patent: 6,496,366 →
Application: 09/479,824 →
Metered force single point heatsink attach mechanism
Patent: 6,169,659 →
Application: 09/498,939 →
System and Method for a Hierarchical System Management Architecture of a Highly Scalable Computing System
Patent: 6,845,410 →
Application: 09/522,695 →
Method and System for Clock Cycle Measurement and Delay Offset
Patent: 6,680,636 →
Application: 09/541,068 →
Scan Interface Chip (Sic) System and Method for Scan Testing Electronic Systems
Patent: 6,760,876 →
Application: 09/542,791 →
Housing Ground Bracket and Method
Patent: 6,574,121 →
Application: 09/548,497 →
Panel Gasket
Patent: 6,483,024 →
Application: 09/608,378 →
Electrical Connector with Latching Backplate Assembly
Patent: 6,293,813 →
Application: 09/608,935 →
System, Method and Computer Program Product for Implementing Scalable Multi-Reader/Single-Writer Locks
Patent: 6,601,120 →
Application: 09/615,312 →
I/O Impedance Controller
Patent: 6,703,908 →
Application: 09/619,724 →
Printed Circuit Board Stiffener
Patent: 6,512,676 →
Application: 09/619,725 →
Printed Circuit Board Component Packaging
Patent: 6,487,082 →
Application: 09/620,059 →
Memory daughter card apparatus, configurations, and methods
Application: 09/620,178 →
Optimize Global Net Timing with Repeater Buffers
Patent: 6,684,373 →
Application: 09/620,504 →
Method and Apparatus for Prefetching Information and Storing the Information in a Stream Buffer
Patent: 6,901,500 →
Application: 09/627,471 →
System Method and Computer Program Product for Remote Graphics Processing
Patent: 7,274,368 →
Application: 09/629,458 →
Method for Displaying Three-Dimensional Objects and a Computer-Readable Storage Medium Storing a Program for Achieving the Same
Patent: 6,683,607 →
Application: 09/636,098 →
System and Method for a Hierarchical System Management Architecture of a Highly Scalable Computing System
Patent: 7,219,156 →
Application: 09/644,698 →
Method and System for Calculating Interconnect Moments and Delay
Patent: 6,532,575 →
Application: 09/660,732 →
System for Communications Where First Priority Data Transfer Is Not Disturbed by Second Priority Data Transfer and Where Allocated Bandwidth Is Removed When Process Terminates Abnormally
Patent: 38,134 →
Application: 09/679,447 →
Method and System for Estimating Interconnect Delay
Patent: 6,853,969 →
Application: 09/713,842 →
Method and System for Determining Repeater Allocation Regions
Patent: 6,550,048 →
Application: 09/714,047 →
Backshell assembly
Application: 09/730,077 →
Publication: US 2002/0001989
System and Method for Maintaining and Recovering Data Consistency Across Multiple Pages
Patent: 6,721,739 →
Application: 09/730,871 →
Computer Chassis for Dual Offset Opposing Main Boards
Patent: 6,667,891 →
Application: 09/789,602 →
Publication: US 2002/0118514
Maintaining Process Group Membership for Node Clusters in High Availability Computing Systems
Patent: 7,627,694 →
Application: 09/811,158 →
Publication: US 2002/0049845
Packetized Data Transmissions in a Switched Router Architecture
Patent: 6,985,484 →
Application: 09/896,370 →
Memory Device Storing Data and Directory Information Thereon, and Method for Providing the Directory Information and the Data in the Memory Device
Patent: 6,775,742 →
Application: 09/909,693 →
Publication: US 2002/0032838
System and Method for Removing Data from Processor Caches in a Distributed Multi-Processor Computer System
Patent: 8,635,410 →
Application: 09/909,700 →
System and Method for Reducing Memory Latency During Read Requests
Patent: 6,678,798 →
Application: 09/909,701 →
Queue Circuit and Method for Memory Arbitration Employing Same
Patent: 7,406,554 →
Application: 09/909,704 →
System and Method for Memory Arbitration
Patent: 6,816,947 →
Application: 09/909,705 →
Method and System for Using High Count Invalidate Acknowledgements in Distributed Shared Memory Systems
Patent: 6,718,442 →
Application: 09/910,274 →
Method and System for Storing Data at Input/Output (I/O) Interfaces for a Multiprocessor System
Patent: 6,795,900 →
Application: 09/910,363 →
Method and System for Controlling Data Access Between at Least Two Memory Arrangements
Patent: 6,839,820 →
Application: 09/910,395 →
Method and System for Maintaining Data at Input/Output (I/O) Interfaces for a Multiprocessor System
Patent: 6,981,101 →
Application: 09/910,531 →
System and Method for Transferring Ownership of Data in a Distributed Shared Memory System
Patent: 6,829,683 →
Application: 09/910,572 →
Method and System for Covering Multiple Resources with a Single Credit in a Computer System
Patent: 7,007,097 →
Application: 09/910,584 →
System and method for ordering of data transferred over multiple channels
Patent: 7,453,878 →
Application: 09/910,587 →
System and Method for Handling Updates to Memory in a Distributed Shared Memory System
Patent: 6,915,387 →
Application: 09/910,589 →
Providing Shared and Non-Shared Access to Memory in a System with Plural Processor Coherence Domains
Patent: 7,069,306 →
Application: 09/910,591 →
Method and Apparatus for Managing Node Controllers Using Partitions in a Computer System
Patent: 6,877,029 →
Application: 09/910,629 →
Method and System for Efficient Use of a Multi-Dimensional Sharing Vector in a Computer System
Patent: 6,915,388 →
Application: 09/910,630 →
Method and System for Managing Data at an Input/Output Interface for a Multiprocessor System
Patent: 6,859,863 →
Application: 09/910,631 →
Transparent Distribution and Execution of Data in a Multiprocessor Environment
Patent: 7,249,357 →
Application: 09/934,443 →
Publication: US 2003/0036809
Sub Rack Based Vertical Housing for Computer Systems
Patent: 6,487,080 →
Application: 09/955,562 →
Publication: US 2002/0036894
System, method, and computer program product for capturing a visualization session
Application: 09/995,668 →
Publication: US 2002/0063715
Remote Address Translation in a Multiprocessor System
Patent: 6,925,547 →
Application: 10/017,488 →
Publication: US 2002/0169938
Node Translation and Protection in a Clustered Multiprocessor System
Patent: 7,356,026 →
Application: 10/020,854 →
Publication: US 2002/0172199
Method and Apparatus for Handling Invalidation Requests to Processors Not Present in a Computer System
Patent: 6,578,115 →
Application: 10/047,347 →
Publication: US 2002/0059500
Bus Speed Controller Using Switches
Patent: 6,799,238 →
Application: 10/068,991 →
Publication: US 2003/0149805
Method and System for Cache Coherence in Dsm Multiprocessor System Without Growth of the Sharing Vector
Patent: 6,877,030 →
Application: 10/084,088 →
Publication: US 2003/0163543
System and Method for Improving Speed of Operation of Integrated Circuits
Patent: 6,621,300 →
Application: 10/131,309 →
Programmable Differential Delay Circuit with Fine Delay Adjustment
Patent: 6,486,723 →
Application: 10/142,472 →
Publication: US 2002/0175728
System and Method for Repairing a Memory Column
Patent: 6,724,669 →
Application: 10/142,822 →
Programmable Differential Delay Circuit with Fine Delay Adjustment
Patent: 6,803,872 →
Application: 10/143,413 →
Publication: US 2002/0175730
Actuatable Connector System
Patent: 6,672,878 →
Application: 10/160,437 →
Publication: US 2003/0224630
Clustered Filesystem
Patent: 6,950,833 →
Application: 10/162,258 →
Publication: US 2003/0078946
Spacial Derivative Bus Encoder and Decoder
Patent: 7,167,523 →
Application: 10/171,095 →
Publication: US 2003/0072378
System and Method for a Self-Calibrating Sense-Amplifier Strobe
Patent: 6,714,464 →
Application: 10/180,478 →
Publication: US 2004/0001364
Apparatus and Method for Maximizing Equipment Storage Density
Patent: 6,862,187 →
Application: 10/191,923 →
Publication: US 2004/0008493
Modular Fan Brick and Method for Exchanging Air in a Brick-Based Computer System
Patent: 6,765,795 →
Application: 10/200,803 →
Publication: US 2004/0017653
Method and Rack for Exchanging Air with Modular Bricks in a Computer System
Patent: 6,882,531 →
Application: 10/201,230 →
Publication: US 2004/0017655
Printed Circuit Board Stiffener
Patent: 6,771,517 →
Application: 10/202,377 →
Publication: US 2003/0038096
Backshell Assembly
Patent: 7,124,505 →
Application: 10/205,877 →
Publication: US 2002/0182925
Method and System for Renaming Registers in a Microprocessor
Patent: 7,406,587 →
Application: 10/210,257 →
Computer Enclosure and Method for Manufacture
Patent: 6,813,151 →
Application: 10/219,654 →
Memory Daughter Card Apparatus, Configurations, and Methods
Patent: 6,726,505 →
Application: 10/231,511 →
Publication: US 2003/0077925
Electromagneric Interference Cable Backshell Assembly for High-Density Interconnect
Patent: 7,485,003 →
Application: 10/235,221 →
Publication: US 2004/0048516
Sub Rack Based Vertical Housing for Computer Systems
Patent: 6,661,667 →
Application: 10/252,654 →
Publication: US 2003/0021091
System and Method for Hierarchical Approximation of Least Recently Used Replacement Algorithms Within a Cache Organized as Two or More Super-Ways of Memory Blocks
Patent: 6,986,001 →
Application: 10/274,766 →
Publication: US 2004/0078526
High Density Computer Equipment Storage System
Patent: 6,741,467 →
Application: 10/279,153 →
Publication: US 2003/0035268
System and Method for Conveying Information
Patent: 7,712,006 →
Application: 10/310,237 →
System and Method for Conveying Information
Patent: 7,447,794 →
Application: 10/310,400 →
Recovery and Relocation of a Distributed Name Service in a Cluster Filesystem
Patent: 7,593,968 →
Application: 10/345,357 →
Publication: US 2004/0143607
Synchronization Circuits for the Distribution of Unique Data to Scattered Locations
Patent: 7,302,027 →
Application: 10/356,236 →
Publication: US 2004/0151270
Global Pointers for Scalable Parallel Applications
Patent: 7,451,278 →
Application: 10/365,658 →
Publication: US 2004/0162952
Multi-Class Heterogeneous Clients in a Clustered Filesystem
Patent: 7,617,292 →
Application: 10/414,236 →
Publication: US 2004/0249904
Clustered Filesystem for Mix of Trusted and Untrusted Nodes
Patent: 7,640,582 →
Application: 10/414,239 →
Publication: US 2004/0250113
Messaging Between Heterogeneous Clients of a Storage Area Network
Patent: 7,765,329 →
Application: 10/414,245 →
Publication: US 2004/0210673
System, Method, and Computer Program Product for Applying Different Transport Mechanisms for User Interface and Image Portions of a Remotely Rendered Image
Patent: 8,291,009 →
Application: 10/426,003 →
Publication: US 2004/0221004
Real-Time Storage Area Network
Patent: 7,818,424 →
Application: 10/434,340 →
Publication: US 2003/0212792
Ventilated Housing for Electronic Components
Patent: 6,975,510 →
Application: 10/435,211 →
Computer Rack with Power Distribution System
Patent: 7,173,821 →
Application: 10/464,028 →
Publication: US 2004/0228087
Computer Rack Cooling System
Patent: 6,822,859 →
Application: 10/603,338 →
Publication: US 2004/0004813
Relocation of Metadata Server with Outstanding Dmapi Requests
Patent: 8,010,558 →
Application: 10/620,387 →
Publication: US 2005/0015384
Network filesystem asynchronous I/O scheduling
Patent: 8,635,256 →
Application: 10/620,797 →
Publication: US 2005/0015385
Method for Equitable Resource Sharing Between Local and Network Filesystems
Patent: 7,827,556 →
Application: 10/620,835 →
Publication: US 2005/0015770
High Density Computer Equipment Storage Systems
Patent: 6,850,408 →
Application: 10/627,375 →
Detection and Control of Resource Congestion by a Number of Processors
Patent: 8,185,703 →
Application: 10/631,988 →
Publication: US 2005/0027948
Address Translation Using a Page Size Tag
Patent: 7,089,398 →
Application: 10/632,131 →
Publication: US 2005/0027961
System and Method for Encoding Page Size Information
Patent: 7,100,018 →
Application: 10/632,681 →
Publication: US 2005/0027962
Sub Rack Based Vertical Housing for Computer Systems
Patent: 6,847,526 →
Application: 10/660,173 →
Publication: US 2004/0047133
High Density Computer Equipment Storage System
Patent: 8,582,290 →
Application: 10/678,006 →
Publication: US 2004/0070936
Snapshot copy of data volume during data access
Application: 10/682,841 →
Publication: US 2004/0139125
Memory Access Management in a Shared Memory Multi-Processor System
Patent: 7,174,437 →
Application: 10/687,196 →
Publication: US 2005/0086439
Method for a Workload-Adaptive High Performance Storage System with Data Protection
Patent: 7,152,142 →
Application: 10/691,838 →
Multi-processor system and method of accessing data therein
Application: 10/696,146 →
Publication: US 2004/0098561
Method for Retrieving and Modifying Data Elements on a Shared Medium
Patent: 7,324,995 →
Application: 10/714,398 →
Publication: US 2005/0108231
System and Method for Reducing Memory Latency During Read Requests
Patent: 6,938,128 →
Application: 10/725,897 →
Method and Apparatus for Maintaining Coherence Information in Multi-Cache Systems
Patent: 7,370,154 →
Application: 10/785,575 →
Publication: US 2005/0188160
Computer Rack Cooling System
Patent: 7,123,477 →
Application: 10/815,422 →
Publication: US 2005/0219811
System and Method for Performing Address Translation in a Computer System
Patent: 7,181,589 →
Application: 10/835,855 →
Publication: US 2005/0066147
System and Method for Performing Memory Operations in a Computing System
Patent: 7,398,359 →
Application: 10/836,932 →
Method for Performing Cache Coherency in a Computer System
Patent: 7,802,058 →
Application: 10/837,057 →
Multiprocessor Node Controller Circuit and Method
Patent: 7,406,086 →
Application: 10/868,181 →
Publication: US 2005/0053057
Apparatus and Method for Maximizing Equipment Storage Density
Patent: 6,906,925 →
Application: 10/875,355 →
Publication: US 2004/0228098
System and method for networked computer graphics
Application: 10/899,316 →
Publication: US 2006/0026234
Method for Empirically Determining a Qualified Bandwidth of File Storage for a Shared Filed System
Patent: 7,590,775 →
Application: 10/912,722 →
Publication: US 2006/0028987
Method and System for Network Storage Device Failure Protection and Recovery
Patent: 7,529,967 →
Application: 10/980,186 →
Publication: US 2006/0107096
Sub Rack Based Vertical Housing for Computer Systems
Patent: 7,193,857 →
Application: 11/012,591 →
Publication: US 2005/0105279
Computer Rack Cooling System with Variable Airflow Impedance
Patent: 7,508,663 →
Application: 11/026,163 →
Publication: US 2005/0168945
Rack-Mounted Air Deflector
Patent: 7,286,345 →
Application: 11/054,031 →
Publication: US 2006/0176664
Computer System with Dual Operating Modes
Patent: 7,849,311 →
Application: 11/079,409 →
Publication: US 2006/0212945
Adaptable Power Supply
Patent: 7,558,971 →
Application: 11/099,396 →
Publication: US 2005/0218869
Node Synchronization for Multi-Processor Computer Systems
Patent: 7,464,115 →
Application: 11/113,805 →
Publication: US 2006/0242308
Anticipatory Programmable Interface Pre-Driver
Patent: 7,327,167 →
Application: 11/116,734 →
Publication: US 2006/0244486
Liquid DIMM Cooler
Application: 11/121,975 →
Publication: US 2006/0250772
Directional Fan Assembly
Patent: 7,372,695 →
Application: 11/125,423 →
Publication: US 2005/0280986
Electromagnetic Interference Shield for I/O Ports
Patent: 7,411,784 →
Application: 11/125,424 →
Publication: US 2005/0265003
Computer Rack with Cluster Modules
Patent: 7,236,370 →
Application: 11/125,477 →
Publication: US 2005/0270751
Interface Assembly
Patent: 7,460,375 →
Application: 11/125,941 →
Publication: US 2005/0286235
Rack Mounted Computer System
Patent: 7,529,097 →
Application: 11/125,942 →
Publication: US 2005/0265004
Fault Tolerant Memory System
Patent: 7,765,454 →
Application: 11/136,260 →
Publication: US 2006/0282751
Ventilated Housing for Electronic Components
Patent: 7,227,751 →
Application: 11/232,399 →
Publication: US 2006/0018094
Hot Plug Control Apparatus and Method
Patent: 7,533,208 →
Application: 11/235,493 →
Publication: US 2007/0080716
System for insertion and extraction of an electronic module
Patent: 7,466,561 →
Application: 11/261,045 →
Publication: US 2007/0097662
Data Coherence Method and Apparatus for Multi-Node Computer System
Patent: 8,407,424 →
Application: 11/268,164 →
Publication: US 2007/0106850
Power Supply Cooling System
Patent: 7,535,707 →
Application: 11/282,848 →
Publication: US 2007/0109741
Network topology for a scalable multiprocessor system
Application: 11/295,676 →
Publication: US 2006/0282648
Generation and Use of System Level Defect Tables for Main Memory
Patent: 7,478,285 →
Application: 11/323,029 →
Publication: US 2007/0174718
Failsoft System for Multiple Cpu System
Patent: 8,078,907 →
Application: 11/334,526 →
Publication: US 2007/0168716
System and Method for Reducing Back Flow
Patent: 7,425,117 →
Application: 11/343,968 →
Publication: US 2006/0194533
Sub rack based vertical housing for computer systems
Application: 11/386,382 →
Publication: US 2006/0158841
System and Method for Adaptively Deskewing Parallel Data Signals Relative to a Clock
Patent: 7,433,441 →
Application: 11/405,387 →
Publication: US 2006/0188050
Apparatus and Method of Controlling Data Sharing on a Shared Memory Computer System
Patent: 7,386,680 →
Application: 11/413,620 →
Publication: US 2006/0265554
Method and System for Managing Memory in a Multiprocessor System
Patent: 7,500,068 →
Application: 11/426,538 →
Performance Improvement for Block Span Replication
Patent: 7,512,756 →
Application: 11/470,537 →
Publication: US 2007/0055834
Reusing Task Object and Resources
Patent: 7,721,025 →
Application: 11/470,539 →
Publication: US 2007/0073886
Incremental Replication Using Snapshots
Application: 11/470,542 →
Publication: US 2007/0055835
Generating Digest for Block Range via Iscsi
Patent: 7,734,882 →
Application: 11/470,544 →
Publication: US 2007/0088802
BLOCK SNAPSHOTS OVER iSCSI
Application: 11/470,545 →
Publication: US 2007/0055710
Lightweight Management and High Availability Controller
Patent: 7,676,682 →
Application: 11/470,548 →
Publication: US 2007/0130332
Redundant Appliance Configuration Repository in Standard Hierarchical Format
Patent: 8,015,270 →
Application: 11/470,550 →
Publication: US 2007/0067449
Storage Resource Scan
Patent: 8,429,274 →
Application: 11/470,551 →
Publication: US 2007/0055645
System and Method for Optimizing Computational Density
Patent: 7,603,573 →
Application: 11/585,619 →
Publication: US 2008/0155279
System and Method of Synchronizing Real Time Clock Values in Arbitrary Distributed Systems
Patent: 8,036,247 →
Application: 11/620,215 →
Publication: US 2008/0168182
Computer rack with power distribution system
Application: 11/644,770 →
Publication: US 2007/0109736
Load Balancing for Parallel Tasks
Patent: 8,713,576 →
Application: 11/677,460 →
Publication: US 2007/0198986
Direct Memory Access Engine for Data Transfers
Patent: 7,831,746 →
Application: 11/685,750 →
Publication: US 2008/0228958
High Density Computer Equipment Storage System
Patent: 7,355,847 →
Application: 11/715,648 →
Publication: US 2007/0159790
Flow-Through Cooling for Computer Systems
Patent: 7,768,780 →
Application: 11/764,551 →
Publication: US 2008/0024977
Clustered Filesystem with Membership Version Support
Patent: 8,001,222 →
Application: 11/785,255 →
Publication: US 2008/0005196
Clustered Filesystem with Interruptible Token Acquisition
Patent: 7,814,058 →
Application: 11/785,256 →
Publication: US 2008/0010284
Rack-Mounted Air Deflector
Patent: 7,499,273 →
Application: 11/855,370 →
Publication: US 2008/0002358
Container-Based Data Center
Patent: 7,724,513 →
Application: 11/860,685 →
Publication: US 2008/0094797
System, Method, and Computer Program Product for Remote Graphics Processing
Patent: 8,427,491 →
Application: 11/892,627 →
Publication: US 2008/0049030
High Density Computer Equipment Storage System
Patent: 7,525,797 →
Application: 11/928,616 →
Publication: US 2008/0049393
Non-Saturating Fairness Protocol and Method for Nacking Systems
Patent: 8,239,566 →
Application: 12/039,048 →
Publication: US 2009/0222821
Network Topology for a Scalable Multiprocessor System
Patent: 8,433,816 →
Application: 12/121,941 →
Publication: US 2009/0113172
System and Method for Performing Memory Operations in a Computing System
Patent: 7,925,839 →
Application: 12/168,689 →
Multiprocessor Node Controller Circuit and Method
Patent: 7,881,321 →
Application: 12/181,202 →
Publication: US 2009/0024833
System and Method for Adaptively Deskewing Parallel Data Signals Relative to a Clock
Patent: 8,031,823 →
Application: 12/247,122 →
Publication: US 2009/0034673
Interface Assembly
Patent: 7,692,928 →
Application: 12/263,311 →
Publication: US 2009/0086441
System and Method for Conveying Information
Patent: 7,873,741 →
Application: 12/264,871 →
Publication: US 2009/0070480
System and Method for Ordering of Data Transferred Over Multiple Channels
Patent: 8,971,329 →
Application: 12/273,453 →
Node Synchronization for Multi-Processor Computer Systems
Application: 12/330,413 →
Publication: US 2009/0259696
Rack Mounted Computer System Including Chassis Retainer
Patent: 7,911,785 →
Application: 12/407,744 →
Publication: US 2009/0178986
Hot Plug Control Apparatus and Method
Patent: 7,868,656 →
Application: 12/463,941 →
Publication: US 2009/0276555
Method for Empirically Determining a Qualified Bandwidth of File Storage for a Shared Filed System Using a Guaranteed Rate I/O (Grio) or Non-Grio Process
Patent: 7,908,410 →
Application: 12/538,020 →
Publication: US 2010/0017545
Apparatus and Method for Enhancing the Maintainability and Cooling of Computer Components on Trays in a Cabinet
Application: 12/609,613 →
Publication: US 2010/0110628
Multi-Class Heterogeneous Clients in a Clustered Filesystem
Patent: 8,396,908 →
Application: 12/615,930 →
Publication: US 2010/0146045
Clustered File System for Mix of Trusted and Untrusted Nodes
Patent: 8,151,347 →
Application: 12/648,501 →
Publication: US 2010/0154054
Interface Assembly
Patent: 7,924,570 →
Application: 12/726,299 →
Publication: US 2010/0172077
Method for Performing Cache Coherency in a Computer System
Patent: 8,402,225 →
Application: 12/887,374 →
Publication: US 2011/0016277
Clustered Filesystem with Data Volume Snapshot Maintenance
Patent: 8,156,080 →
Application: 12/903,096 →
Publication: US 2011/0191297
Real-Time Storage Area Network
Patent: 8,589,499 →
Application: 12/907,867 →
Publication: US 2011/0093594
Method for Equitable Resource Sharing Between Local and Network Filesystems
Patent: 8,438,575 →
Application: 12/938,212 →
Publication: US 2011/0047198
Computer System with Dual Operating Modes
Patent: 8,433,902 →
Application: 12/961,328 →
Publication: US 2011/0078699
System and Method for Conveying Information
Patent: 8,327,015 →
Application: 13/008,635 →
Publication: US 2011/0113153
Rack Mounted Computer System
Patent: 8,432,689 →
Application: 13/028,169 →
Publication: US 2011/0133620
System and Method for Performing Memory Operations in a Computing System
Patent: 8,321,634 →
Application: 13/084,280 →
Publication: US 2011/0191545
Clustered Filesystem with Membership Version Support
Patent: 8,683,021 →
Application: 13/211,200 →
Publication: US 2012/0072558
Relocation of Metadata Server with Outstanding Dmapi Requests
Patent: 9,275,058 →
Application: 13/220,257 →
Publication: US 2012/0059854
System and Method of Synchronizing Real Time Clock Values in Arbitrary Distributed Systems
Patent: 8,498,315 →
Application: 13/270,002 →
Publication: US 2012/0089709
Clustered Filesystems for Mix of Trusted and Untrusted Nodes
Patent: 8,578,478 →
Application: 13/438,304 →
Publication: US 2012/0192270
Clustered Filesystem with Data Volume Snapshot Maintenance
Patent: 8,527,463 →
Application: 13/442,037 →
Publication: US 2012/0191654
Detection and Control of Resource Congestion by a Number of Processors
Patent: 9,271,267 →
Application: 13/478,051 →
Publication: US 2012/0272002
Applying Different Transport Mechanisms for User Interface and Image Portions of a Remotely Rendered Image
Patent: 8,924,473 →
Application: 13/620,223 →
Publication: US 2013/0169650
System and Method for Performing Memory Operations In A Computing System
Application: 13/683,367 →
Publication: US 2013/0080709
System and Method for Conveying Information
Patent: 8,812,721 →
Application: 13/705,087 →
Publication: US 2013/0198301
System and Method for Error Logging
Patent: 9,389,940 →
Application: 13/780,248 →
Publication: US 2014/0245079
First-in First-Out (FIFO) Modular Memory Structure
Application: 13/784,160 →
Publication: US 2014/0250252
High Performance System That Includes Reconfigurable Protocol Tables Within an Asic Wherein a First Protocol Block Implements an Inter-Asic Communications Protocol and a Second Block Implements an Intra-Asic Function
Patent: 8,892,805 →
Application: 13/788,281 →
Publication: US 2014/0258679
Multi-Class Heterogeneous Clients in a Clustered Filesystem
Patent: 8,838,658 →
Application: 13/794,483 →
Publication: US 2013/0198350
Global Synchronous Clock Circuit and Method for Blade Processors
Patent: 9,104,343 →
Application: 13/798,604 →
Publication: US 2014/0281656
Enhanced Performance Monitoring Method and Apparatus
Patent: 9,250,826 →
Application: 13/801,841 →
Publication: US 2014/0281181
Associative Look-up Instruction for a Processor Instruction Set Architecture
Application: 13/802,086 →
Publication: US 2014/0281208
Apparatus and Methods for Providing Performance Data of Nodes in a High Performance Computing System
Application: 13/804,532 →
Publication: US 2014/0280663
Maintaining Coherence When Removing Nodes From a Directory-Based Shared Memory System
Patent: 9,632,934 →
Application: 13/804,537 →
Publication: US 2014/0281266
Synchronizing Scheduler Interrupts Across Multiple Computing Nodes
Application: 13/828,896 →
Publication: US 2014/0281036
Bandwidth on-Demand Adaptive Routing
Patent: 9,237,093 →
Application: 13/830,432 →
Publication: US 2014/0269324
Active Archive Bridge
Patent: 9,613,035 →
Application: 13/831,649 →
Publication: US 2014/0279926
Dynamic Assembly and Dispatch of Controlling Software
Application: 13/831,671 →
Publication: US 2014/0280957
Autonomous Power Sparing Storage
Application: 13/831,683 →
Publication: US 2014/0281604
Opportunistic Tier in Hierarchical Storage
Application: 13/831,694 →
Publication: US 2014/0281300
Temporal Hierarchical Tiered Data Storage
Application: 13/831,702 →
Publication: US 2014/0281322
Stealth Power Management in Storage Array
Application: 13/831,719 →
Publication: US 2014/0281621
Dynamic Storage Device Libraries
Patent: 9,158,474 →
Application: 13/831,738 →
Publication: US 2014/0281210
File System Replication
Application: 13/831,745 →
Publication: US 2014/0279913
Logical Block Protection for Tape Interchange
Patent: 8,879,195 →
Application: 13/831,751 →
Publication: US 2014/0268393
Hierarchical System Manager Rollback
Patent: 9,612,920 →
Application: 13/831,771 →
Publication: US 2014/0279919
Address Resource Mapping In A Shared Memory Computer System
Patent: 9,176,669 →
Application: 13/833,956 →
Publication: US 2014/0281334
Elastic Hierarchical Data Storage Backend
Application: 13/835,462 →
Publication: US 2014/0281301
Block Device Management
Patent: 8,881,176 →
Application: 13/835,575 →
Publication: US 2014/0281046
Fast Mount Cache
Application: 13/836,073 →
Publication: US 2014/0281211
Method for Transparently Connecting Augmented Network Socket Operations
Patent: 9,438,638 →
Application: 13/843,810 →
Publication: US 2014/0280984
Scalable Infiniband Interconnect Performance and Diagnostic Tool
Patent: 9,240,940 →
Application: 13/843,919 →
Publication: US 2014/0269342
Method for Performing Cache Coherency in a Computer System
Application: 13/846,731 →
Publication: US 2013/0282988
Data Coherence Method and Apparatus for Multi-Node Computer System
Patent: 8,812,765 →
Application: 13/848,546 →
Publication: US 2013/0212339
System, Method, and Computer Program Product for Remote Graphics Processing
Patent: 8,581,917 →
Application: 13/850,250 →
Publication: US 2013/0215129
Hard Disk Drive Mounting Bracket
Application: 13/853,839 →
Publication: US 2014/0263907
Virtual Storage Pool
Patent: 9,778,884 →
Application: 13/853,863 →
Publication: US 2014/0281355
Micro Ethernet Connector
Patent: 9,124,049 →
Application: 13/853,943 →
Publication: US 2014/0273601
Quick Connect Coupler Rapid Disengagement Extension Mechanism
Application: 13/860,465 →
Publication: US 2014/0265314
Network Topology for a Scalable Multiprocessor System
Patent: 9,514,092 →
Application: 13/873,058 →
Publication: US 2013/0246653
Tcp Server Bootloader
Application: 13/897,198 →
Publication: US 2014/0282478
Total Quotas for Data Storage System
Patent: 9,229,661 →
Application: 13/897,215 →
Publication: US 2014/0281214
Allocating Accelerators to Threads in a High Performance Computing System
Application: 13/900,757 →
Publication: US 2014/0282584
Assessment of a High Performance Computing Application in Relation to Network Latency Due to the Chosen Interconnects
Patent: 9,465,712 →
Application: 13/928,050 →
Publication: US 2015/0007198
High Performance Computing Network Activity Tracking Tool
Application: 13/930,955 →
Publication: US 2015/0006713
On-Blade Cold Sink For High-Density Clustered Computer System
Patent: 9,229,497 →
Application: 13/931,730 →
Publication: US 2014/0126141
Twin Server Blades for High-Density Clustered Computer System
Patent: 9,811,127 →
Application: 13/931,748 →
Publication: US 2014/0126142
Closed-Loop Cooling System for High-Density Clustered Computer System
Patent: 9,606,588 →
Application: 13/931,754 →
Publication: US 2014/0124168
Combining Parallel Coordinates and Histograms
Application: 13/931,785 →
Publication: US 2015/0007079
Replicated Database Using One Sided Rdma
Application: 13/931,790 →
Publication: US 2015/0006478
Volume Rendering for Graph Renderization
Application: 13/931,797 →
Publication: US 2015/0007113
Server with Heat Pipe Cooling
Patent: 9,426,932 →
Application: 13/931,813 →
Publication: US 2014/0268550
Server with Heat Baffle Cooling
Application: 13/931,814 →
Publication: US 2014/0268552
Integrated Visualization
Patent: 9,389,760 →
Application: 13/931,818 →
Publication: US 2014/0068488
Dynamic Resource Scheduling
Patent: 9,424,098 →
Application: 13/931,819 →
Publication: US 2014/0068627
Localized Fast Bulk Storage in a Multi-Node Computer System
Patent: 9,477,592 →
Application: 13/931,861 →
Publication: US 2014/0298079
Populating Localized Fast Bulk Storage in a Multi-Node Computer System
Patent: 9,268,684 →
Application: 13/931,870 →
Publication: US 2014/0297923
Independent Removable Computer Rack Power Distribution System for High-Density Clustered Computer System
Patent: 9,128,682 →
Application: 13/949,920 →
Publication: US 2014/0126143
Transactional Memory Proxy
Patent: 9,208,090 →
Application: 14/012,783 →
Publication: US 2014/0068201
Clustered Filesystem with Data Volume Snapshot
Patent: 9,020,897 →
Application: 14/012,894 →
Publication: US 2013/0346371
Scalable Matrix Multiplication in a Shared Memory System
Application: 14/041,974 →
Publication: US 2014/0331014
Clustered Filesystems for Mix of Trusted and Untrusted Nodes
Patent: 9,405,606 →
Application: 14/042,438 →
Publication: US 2014/0032958
System, Method, and Computer Program Product for Remote Graphics Processing
Patent: 8,760,456 →
Application: 14/042,659 →
Publication: US 2014/0028691
Real-Time Storage Area Network
Patent: 9,386,100 →
Application: 14/042,695 →
Publication: US 2014/0032766
Hot Swappable Computer Cooling System
Application: 14/102,121 →
Publication: US 2015/0160702
Network Filesystem Asynchronous I/O Scheduling
Patent: 9,361,474 →
Application: 14/141,278 →
Publication: US 2014/0108458
System and Method for Removing Data from Processor Caches in a Distributed Multi-Processor Computer System
Patent: 9,367,473 →
Application: 14/141,326 →
Publication: US 2014/0108736
Automatic Selection of Center of Rotation for Graphical Scenes
Application: 14/152,968 →
Publication: US 2015/0199105
Visually Approximating Parallel Coordinates Data
Application: 14/152,969 →
Publication: US 2015/0199420
Selection Thresholds in a Visualization Interface
Application: 14/162,613 →
Publication: US 2015/0205506
Raid Set Initialization
Patent: 9,612,745 →
Application: 14/164,045 →
Publication: US 2015/0212736
Clustered Filesystem with Membership Version Support
Patent: 9,519,657 →
Application: 14/199,619 →
Publication: US 2014/0188955
High Speed Serial Link in-Band Lane Fail Over for Ras and Power Management
Patent: 9,852,096 →
Application: 14/224,795 →
Publication: US 2015/0278040
Low Latency Serial Data Encoding Scheme For Enhanced Burst Error Immunity and Long Term Reliability
Patent: 9,252,812 →
Application: 14/229,796 →
Publication: US 2015/0280746
Temporal Based Collaborative Mutual Exclusion Control of a Shared Resource
Patent: 9,686,206 →
Application: 14/265,195 →
Publication: US 2015/0312165
Software Design Pattern for Adapting a Graph Database Visualization Software
Application: 14/266,656 →
Publication: US 2014/0330867
Deploying Software in a Multi-Instance Node
Patent: 9,424,091 →
Application: 14/266,758 →
Publication: US 2014/0331239
Platform and Software Framework for Data Intensive Applications in the Cloud
Patent: 9,513,934 →
Application: 14/266,764 →
Publication: US 2014/0330851
Pressure-Activated Server Cooling System
Application: 14/289,590 →
Publication: US 2015/0003010
System, Method, and Computer Program Product for Remote Graphics Processing
Patent: 9,230,295 →
Application: 14/303,566 →
Publication: US 2014/0292786
Linearized Dynamic Storage Pool
Application: 14/328,423 →
Publication: US 2015/0019807
System and Method for Conveying Information
Patent: 9,654,142 →
Application: 14/335,735 →
Publication: US 2014/0337691
System Method for I/O Acceleration in Hybrid Storage Wherein Copies of Data Segments Are Deleted If Identified Segments Does Not Meet Quality Level Threshold
Patent: 9,619,180 →
Application: 14/335,752 →
Publication: US 2015/0032921
Multi-Class Heterogeneous Clients in a Clustered Filesystem
Patent: 9,606,874 →
Application: 14/481,666 →
Publication: US 2015/0012778
Block Device Management
Patent: 8,997,122 →
Application: 14/492,248 →
Publication: US 2015/0046606
Clustered Filesystem with Data Volume Snapshot
Patent: 9,792,296 →
Application: 14/504,368 →
Publication: US 2015/0019492
Logical Block Protection for Tape Interchange
Patent: 9,412,412 →
Application: 14/521,326 →
Publication: US 2015/0043102
Applying Different Transport Mechanisms for User Interface and Image Portions of a Remotely Rendered Image
Patent: 9,117,288 →
Application: 14/528,929 →
Publication: US 2015/0054840
Micro Ethernet Connector
Patent: 9,461,422 →
Application: 14/529,050 →
Publication: US 2015/0056867
Shared Memory Eigensolver
Patent: 9,262,799 →
Application: 14/536,477 →
Publication: US 2015/0130825
Shared Memory Eigensolver
Patent: 9,547,882 →
Application: 14/537,839 →
Publication: US 2015/0134714
High Performance System That Includes Reconfigurable Protocol Tables Within an Asic Wherein a First Protocol Block Implements an Inter-Asic Communications Protocol and a Second Block Implements an Intra-Asic Function
Patent: 9,122,816 →
Application: 14/542,023 →
Publication: US 2015/0074375
Remote Actuated Leveling Machanism
Application: 14/550,444 →
Publication: US 2015/0146354
Server Embedded Storage Device
Application: 14/565,084 →
Publication: US 2015/0163954
System and Method for Ordering of Data Transferred Over Multiple Channels
Patent: 9,432,299 →
Application: 14/635,708 →
Publication: US 2015/0188832
Apparatus and Method of Resolving Protocol Conflicts in an Unordered Network
Application: 14/644,629 →
Publication: US 2015/0261677
Method and Apparatus for Managing Nodal Power in a High Performance Computer System
Patent: 9,933,826 →
Application: 14/709,201 →
Publication: US 2016/0334846
Scalable Software Stack
Application: 14/710,492 →
Publication: US 2016/0335002
Method and System for High Speed Data Links
Application: 14/742,007 →
Publication: US 2016/0373557
System, Method and Computer Program Product for Remote Graphics Processing
Patent: 9,665,923 →
Application: 14/987,690 →
Publication: US 2016/0239938
Detection and Control of Resource Congestion by a Number of Processors
Application: 15/051,512 →
Publication: US 2016/0248695
Shared Memory Eigensolver
Application: 15/132,085 →
Publication: US 2016/0299874
Managing Power in a High Performance Computing System for Resiliency and Cooling
Application: 15/148,242 →
Publication: US 2016/0349812
Method for Error Logging
Patent: 9,971,640 →
Application: 15/177,609 →
Publication: US 2016/0283309
System and Method for Removing Data from Processor Caches in a Distributed Multi-Processor Computer System
Application: 15/180,322 →
Publication: US 2016/0357671
Integrated Visualization
Application: 15/203,631 →
Publication: US 2016/0364249
Clustered Filesystems for Mix of Trusted and Untrusted Nodes
Application: 15/219,797 →
Publication: US 2017/0026378
Adaptive Routing for Link-Level Retry Protocol
Application: 15/357,479 →
Publication: US 2018/0145913
Packet-Based Adaptive Forward Error Correction
Application: 15/427,941 →
Publication: US 2018/0227078
Housing for Deskside Computer
Patent: 393,249 →
Application: 29/060,131 →
Compact Computer Housing
Patent: 395,286 →
Application: 29/060,203 →
Housing for a Computer
Patent: 393,449 →
Application: 29/060,425 →
Compact Computer Housing
Patent: 396,698 →
Application: 29/065,316 →
Computer Housing
Patent: 417,203 →
Application: 29/096,304 →
Computer Housing
Patent: 431,242 →
Application: 29/097,545 →
Bezel for a Computer
Patent: 429,248 →
Application: 29/108,315 →
Radial Computer System
Patent: 436,950 →
Application: 29/113,555 →
Computer Chassis for Dual, Opposing Main Boards
Patent: 475,705 →
Application: 29/118,970 →
Drive sled handle
Patent: 444,471 →
Application: 29/125,872 →
Drive sled cover
Patent: 444,474 →
Application: 29/125,873 →
Front panel media door
Patent: 445,425 →
Application: 29/125,876 →
Industrial design (visual appearance of the SN-1 rack
Application: 29/127,143 →
Industrial design (visual appeearance) of the x10 and pci brick components of the sn-1 system
Application: 29/127,195 →
Industrial design (visual appearance) of the sn-1 router brick
Application: 29/127,196 →
Server door
Patent: 445,112 →
Application: 29/127,551 →
Server cover
Patent: 444,461 →
Application: 29/127,590 →
Panel
Patent: 464,973 →
Application: 29/135,733 →
Panel
Patent: 464,054 →
Application: 29/135,803 →
Industrial Rack
Patent: 463,796 →
Application: 29/136,032 →
Portion of a Bank of Computer Chassis Mounted to Rack Bars
Patent: 473,225 →
Application: 29/137,456 →
Server Product Faceplate
Patent: 464,056 →
Application: 29/146,729 →
Set of Multi Device Faceplates
Patent: 473,561 →
Application: 29/148,943 →
Optimal Switch Factor for Coupled Rc Interconnects
Application: 60/144,385 →
New Repeater Insertion Methodology for Interconnects
Application: 60/144,386 →
High Density Computer Equipment Storage System
Application: 60/161,578 →
System for dual, offset and opposing main board computers
Application: 60/183,478 →
High availability computing system and method
Application: 60/189,864 →
Backshell assembly
Application: 60/215,472 →
Apparatus and method for controlling the flow and ordering of data transferred over multiple channels
Application: 60/219,915 →
System and method for handling updates to memory in a distributed shared memory system
Application: 60/219,929 →
Method and system for covering multiple resources with a single credit in a computer system
Application: 60/219,937 →
Method and system for maintaining data at input/output (I/O) interfaces for a multiprocessor system
Application: 60/219,938 →
Queue circuit and method for memory arbitration employing same
Application: 60/219,939 →
Method and system for storing data at input/output (I/O) interfaces for a multiprocessor system
Application: 60/219,940 →
Method and system for efficient use of a multi-dimensional sharing vector in a computer system
Application: 60/219,944 →
System and method for transferring ownership of data in a distributed shared memory system
Application: 60/219,945 →
Memory device storing data and directory information thereon, and method for providing the directory information and the data in the memory device
Application: 60/219,947 →
Method and system for controlling data access between at least two memory arrangements
Application: 60/219,948 →
Method and apparatus for managing node controllers using partitions in a computer system
Application: 60/219,949 →
Method and system for managing memory in a multiprocessor system
Application: 60/219,950 →
System and method for removing data from processor caches in a distributed multi-processor computer system
Application: 60/219,951 →
Method and system for using high count invalidate acknowledgements in distributed shared memory systems
Application: 60/219,952 →
System and method for reducing memory latency during read requests
Application: 60/219,953 →
Method and system for managing data at an input/output interface for a multiprocessor system
Application: 60/219,964 →
System and method for memory arbitration
Application: 60/219,965 →
Method and apparatus for rack mounting processors for use in high performance and high availability computing
Application: 60/234,858 →
System, method, and computer program product for capturing a visualization session
Application: 60/253,947 →
Remote address translation in a multiprocessor system
Application: 60/255,620 →
Cluster file system
Application: 60/296,046 →
Real-time storage area network
Application: 60/378,941 →
Computer enclosure and method for manufacture
Application: 60/392,400 →
Method for an workload-adaptive high performance storage system with data protection
Application: 60/421,075 →
Ultraviolet transaction memory operation
Application: 60/467,019 →
Ultraviolet algorithmic address translation
Application: 60/467,063 →
Ultraviolet coherency/consistency methods
Application: 60/467,102 →
Computer rack with power distribution system
Application: 60/471,430 →
Computer rack cooling system with variable airflow impedance
Application: 60/533,380 →
Adaptable power supply
Application: 60/560,159 →
Interface assembly
Application: 60/568,969 →
Directional fan assembly
Application: 60/569,019 →
Electromagnetic interference shield for I/O ports
Application: 60/569,020 →
Rack mounted computer system
Application: 60/569,025 →
System and method for reducing back flow
Application: 60/648,668 →
Directory delegation and update pushing in shared memory microprocessor systems
Application: 60/676,551 →
Incremental replication using snapshots
Application: 60/714,317 →
Performance improvement for block span replication
Application: 60/714,399 →
Reusing task object and resources
Application: 60/714,401 →
Lightweight management and high availability controller
Application: 60/714,402 →
Storage resource scan
Application: 60/714,408 →
Generating digest for block range via iSCSI
Application: 60/714,420 →
Redundant appliance configuration repository in standard hierarchical format
Application: 60/714,426 →
Block snapshots over iSCSI
Application: 60/714,427 →
Load balancing for parallel tasks
Application: 60/775,117 →
Flow-through cooling for computer systems
Application: 60/815,058 →
Container-Based Data Center
Application: 60/826,873 →
Apparatus and Method for Enhancing the Maintainability and Cooling of Computer Components on Trays in a Cabinet
Application: 61/109,818 →
Transactional Memory Proxy
Application: 61/696,047 →
Dynamic Resource Scheduling
Application: 61/696,077 →
Integrated Visualization
Application: 61/696,078 →
High-Density Clustered Computer System
Application: 61/724,274 →
Micro Ethernet Connector
Application: 61/779,351 →
Virtual Storage Pool
Application: 61/780,292 →
Server with Heat Pipe Cooling
Application: 61/780,770 →
Server with Heat Baffle Cooling
Application: 61/780,787 →
Hard Disk Drive Mounting Bracket
Application: 61/780,790 →
Quick Connect Coupler Rapid Disengagement Extension Mechanism
Application: 61/782,873 →
Allocating Accelerators to Threads in a High Performance Computing System
Application: 61/783,544 →
Total Quotas for Data Storage System
Application: 61/786,444 →
Tcp Server Bootloader
Application: 61/789,681 →
Localized Fast Bulk Storage in a Multi-Node Computer System
Application: 61/806,716 →
Scalable Matrix Multiplication in a Shared Memory System
Application: 61/817,928 →
Flexible, Scalable, and Integrated Big Data Ecosystem for Data Ingestion, Analytics, and Visualization
Application: 61/818,282 →
Platform and Software Framework for Data Intensive Applications in the Cloud
Application: 61/818,288 →
Platform and Software Framework for Data Intensive Applications in the Cloud
Application: 61/841,262 →
Pressure-Activated Server Cooling System
Application: 61/841,270 →
Software Design Pattern for Adapting a Graph Database Visualization Software
Application: 61/841,279 →
Linearized Dynamic Storage Pool
Application: 61/845,162 →
I/O Acceleration in Hybrid Storage
Application: 61/859,521 →
Modifying Binning Operations
Application: 61/864,586 →
Deploying Big Data Software in a Multi-Instance Node
Application: 61/888,412 →
Shared Memory Eigensolver
Application: 61/901,731 →
Server Embedded Storage Device
Application: 61/913,901 →
Apparatus and Method of Resolving Protocol Conflicts in an Unordered Network
Application: 61/951,792 →
PLASMA Eigensolution on Large Scale Cache-Coherent Shared Memory Systems
Application: 62/149,061 →
Managing Power in a High Performance Computer System for Error Avoidance or Cooling
Application: 62/169,058 →
Caching Network Fabric for High Performance Computing
Application: 62/362,911 →
Workload Management System and Process
Application: 62/363,014 →
Message Passing Multi Processor System
Application: 90/013,174 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Merger Apr 18, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032714/0427 →
Change of Name Apr 18, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032714/0230 →
Assignment of Assignor's Interest Apr 18, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032714/0032 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests... Apr 24, 2014
From: U.S. BANK NATIONAL ASSOCIATION, AS TRUSTEE
To: SILICON GRAPHICS, INC.
Reel/Frame 032757/0467 →
Assignment of Assignor's Interest Apr 24, 2014
From: SPIX, GEORGE A.; WENGELSKI, DIANE M.; HAWKINSON, STUART W.; JOHNSON, MARK D.
To: SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
Reel/Frame 032752/0532 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests... Apr 24, 2014
From: MORGAN STANLEY & CO., INCORPORATED
To: SILICON GRAPHICS, INC.
Reel/Frame 032757/0847 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests... Apr 24, 2014
From: FOOTHILL CAPITAL CORPORATION
To: SILICON GRAPHICS, INC.
Reel/Frame 032757/0001 →
Assignment of Assignor's Interest Apr 25, 2014
From: SUPERCOMPUTER SYSTEMS LIMITED PARTNERSHIP
To: IBM HOLDINGS, INC.
Reel/Frame 032757/0293 →
Release of Security Interest Apr 25, 2014
From: IBM HOLDINGS, INC.
To: CRAY RESEARCH, INC. C/O DAVID E. FRASCH
Reel/Frame 032757/0428 →
Change of Name Jan 22, 2015
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 034804/0661 →
Merger Jan 22, 2015
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 034804/0437 →
Assignment of Assignor's Interest Jan 22, 2015
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 034804/0446 →
Security Interest Mar 13, 2015
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035200/0722 →
Assignment of Assignor's Interest Jan 28, 2016
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: MINESET, INC.
Reel/Frame 037614/0449 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests. Jul 26, 2016
From: FOOTHILL CAPITAL CORPORATION
To: SILICON GRAPHICS, INC.
Reel/Frame 039474/0606 →
Merger Jul 26, 2016
From: CRAY RESEARCH, INC.
To: CRAY RESEARCH, L.L.C.
Reel/Frame 039474/0796 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests. Jul 26, 2016
From: MORGAN STANLEY & CO., INCORPORATED
To: SILICON GRAPHICS, INC.
Reel/Frame 039482/0015 →
Order. . .Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests Jul 27, 2016
From: U.S. BANK NATIONAL ASSOCIATION, AS TRUSTEE
To: SILICON GRAPHICS, INC
Reel/Frame 039484/0869 →
Change of Name Aug 1, 2016
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 039535/0525 →
Merger Aug 1, 2016
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 039307/0778 →
Assignment of Assignor's Interest Aug 1, 2016
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 039535/0349 →
Change of Name Aug 9, 2016
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 039636/0809 →
Assignment of Assignor's Interest Oct 21, 2016
From: CRAY RESEARCH, L.L.C.
To: SILICON GRAPHICS, INC.
Reel/Frame 040092/0651 →
Merger Oct 21, 2016
From: CRAY RESEARCH, INC.
To: CRAY RESEARCH, L.L.C.
Reel/Frame 040464/0893 →
Merger Oct 21, 2016
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 040459/0518 →