Method and apparatus for maintaining coherence information in multi-cache systems
View Patent ↗A method and apparatus for maintaining coherence information in multi-cache systems is described herein. In one embodiment, the apparatus includes an Ingrained Sharing Directory Cache (ISDC) to store state information about recent copies of local memory blocks. The ISDC is adapted to receive Ingrained Sharing Directory Storage (ISDS) requests and create ISDC entries from information presented by the ISDS. The apparatus also includes an ISDC pending queue to store pending ISDC operations.
1. A method comprising:
receiving in an Ingrained Sharing Directory Cache (ISDC) an incoming operation request including an associated incoming memory address;
determining if the incoming operation request is an Ingrained Sharing Directory Storage (ISDS) data reply, wherein the ISDS data reply includes an indication of system caches sharing a memory line having the same memory address as the incoming memory address, wherein the indication is extracted from two or more ISDS entries matching the incoming memory address;
completing a pending ISDC entry if the incoming operation request is an ISDS data reply, wherein completing includes locating a pending ISDC operation associated with the ISDS data reply in an ISDC pending request queue;
if the incoming operation request is not an ISDS data reply and if there is an ISDC entry associated with the incoming operation request, performing the incoming operation request; and
if the incoming operation request is not an ISDS data reply and if there is no ISDC entry associated with the incoming operation request, creating an ISDC entry, wherein creating includes:
requesting information associated with the incoming memory address from the ISDS;
evicting another ISDC entry if there is no free ISDC entry, wherein evicting includes:
requesting the ISDS to store the information for the evicted ISDC entry, wherein requesting includes transferring to the ISDS bit-vector information associated with the evicted ISDC entry, wherein the bit-vector information is used by the ISDS to select two or more ISDS cells, wherein each of the two or more ISDS cells maintains a dynamic full map of shared memory lines cached in a given set of one of the system caches and has an ISDS entry to be used to store status information for the evicted ISDC entry; and
designating the evicted ISDC entry to the incoming operation request;
marking the created ISDC entry as pending, wherein pending indicates that the ISDC entry is waiting to receive a data reply from the ISDS; and
storing the incoming operation request into the ISDC pending request queue.
2. The method of claim 1 , wherein the ISDC entry associated with the incoming memory address indicates whether one or more cached copies of a memory line at the same address as the incoming memory address are in shared or dirty-exclusive state.
3. A method comprising:
receiving in an Ingrained Sharing Directory Cache (ISDC) an incoming operation request including an associated incoming memory address;
determining whether a first ISDC entry associated with the incoming memory address is in the ISDC;
if the first ISDC entry is not in the ISDC, creating the first ISDC entry, wherein creating includes:
receiving a data reply associated with the incoming memory address from an Ingrained Sharing Directory Storage (ISDS), wherein the ISDS data reply includes an indication of system caches sharing a memory line having the same memory address as the incoming memory address, wherein the indication is extracted from two or more ISDS entries matching the incoming memory address;
determining if there is a free ISDC entry in the ISDC;
if the free ISDC entry is not in the ISDC, evicting a second ISDC entry, wherein evicting includes:
requesting the ISDS to store the information for the evicted second ISDC entry, wherein requesting includes transferring to the ISDS bit-vector information associated with the evicted ISDC entry, wherein the bit-vector information is used by the ISDS to select two or more ISDS cells, wherein each of the two or more ISDS cells maintains a dynamic full map of shared memory lines cached in a given set of one of the system caches and has an ISDS entry to be used to store status information for the evicted ISDC entry; and
designating the evicted second ISDC entry as the free ISDC entry; and
replacing the free ISDC entry with the first ISDC entry, wherein replacing includes converting the indication of system caches in the ISDS data reply into bit-vector information associated with the first ISDC and storing status information of the two or more matching ISDS entries into corresponding fields of the first ISDC; and
performing the incoming operation request using the first ISDC entry.
4. The method of claim 3 wherein evicting further includes marking the first ISDC entry pending, wherein pending indicates that the ISDC entry is waiting to receive a data reply from the ISDS.
5. The method of claim 4 further comprising completing a pending ISDC entry if the incoming operation request type is a data reply, wherein completing includes locating a pending ISDC operation in an ISDC pending request queue associated with the ISDS data reply.
6. The method of claim 3 , wherein the ISDC entry associated with the incoming memory address indicates whether a system cache copy of a memory line unit is the only copy of the memory line in the system, wherein the memory line is located at the same address as the incoming memory address.
7. A machine-readable storage medium that provides instructions, which, when executed by a machine, cause the machine to perform operations comprising:
receiving in an Ingrained Sharing Directory Cache (ISDC) an incoming operation request including an associated incoming memory address;
determining whether a first ISDC entry associated with the incoming memory address is in the ISDC;
if the first ISDC entry is not in the ISDC, creating the first ISDC entry, wherein creating includes:
receiving a data reply associated with the incoming memory address from an Ingrained Sharing Directory Storage (ISDS), wherein the ISDS data reply includes an indication of system caches sharing a memory line having the same memory address as the incoming memory address, wherein the indication is extracted from two or more ISDS entries matching the incoming memory address;
determining if there is a free ISDC entry in the ISDC;
if the free ISDC entry is not in the ISDC, evicting a second ISDC entry, wherein evicting includes:
requesting the ISDS to store the information for the evicted second ISDC entry, wherein requesting includes transferring to the ISDS bit-vector information associated with the evicted ISDC entry, wherein the bit-vector information is used by the ISDS to select two or more ISDS cells, wherein the two or more ISDS cells maintains a dynamic full map of shared memory lines cached in a given set of one of the system caches and has an ISDS entry to be used to store status information for the evicted ISDC entry; and
designating the evicted second ISDC entry as the free ISDC entry; and
replacing the free ISDC entry with the first ISDC entry, wherein replacing includes converting the indication of system caches in the ISDS data reply into bit-vector information associated with the first ISDC and storing status information of the two or more matching ISDS entries into corresponding fields of the first ISDC; and
performing the incoming operation request using the first ISDC entry.
8. The machine-readable medium of claim 7 , wherein the evicting further includes marking the first ISDC entry pending, wherein pending indicates that the ISDC entry is waiting to receive a data reply from the ISDS.
9. The machine-readable medium of claim 8 further comprising completing a pending ISDC entry if the incoming operation request type is a data reply, wherein completing includes locating a pending ISDC operation in an ISDC pending request queue associated with the ISDS data reply.
10. The machine-readable medium of claim 7 , wherein the ISDC entry associated with the incoming memory address indicates whether a system cache copy of a memory line unit is the only copy of the memory line in the system, wherein the memory line is located at the same address as the incoming memory address.